Mountain View, Calif.--March 16, 1998--Sierra Research and Technology, Inc.(SRTI, Mountain View, Calif.) and Chip Express Corp. (Santa Clara, Calif.)announced the availability of the SRTI synthesizable Verilog R3000Microprocessor core, preverified in Chip Express silicon.
As part of the Chip Express "Corexpress" program, the companiestogether offer end users the ability to accelerate theirsystem-on--a-chip design cycles by using Sierra core designsprevalidated in Chip Express fast turn silicon.
The R3000 core was implemented on Chip Express's Cx2001, 0.6-(mLPGA (laser programmable gate array). Performance of the chipwas demonstrated by building a breadboard incorporating the R3000 core(chip), external EPROM, crystal oscillator, single line LCD display,and other circuitry. Demo software in the EPROM was able to initializethe LCD display and print out "Chip Express" on it.
The core implementation is about 14,000 logic modules (roughly38,500 gates) and ran at greater than 20 MIPS. The core is currentlyoffered at the netlist level and may be offered as a preplace-and-routed block in the near future.
The SRTI R3000 core is a 32-bit integer RISC processor, designedby Sierra as synthesizable Verilog code to be instruction-set-compatible with the MIPS R3000 architecture. Performance of the design rangesfrom 15 to 100 MIPS, depending on voltage, process technology,and degree of optimization. Area can be less than 3 mm2 at0.35-(m process technology.
Sierra Research and Technology
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