San Jose, Calif.--April 20, 1998--Altera Corp. announced the availability of its EPF10K30A PLD. The EPF10K30A, the newest member of Altera's Flex 10KA family, addresses the increasing performance needs of design engineers by offering 66-MHz PCI performance and up to 126-MHz system speeds for an 8-Bit, 16-TAP FIR filter. The EPF10K30A has 30,000 gates, embedded RAM, and Altera's Multivolt I/O interface.
The EPF10K30A includes I/O clamping diodes, which are required for electrical compliance with the 3.3-V PCI specification. By enabling the designer to select this feature on a pin-by-pin basis, the EPF10K30A is ideal for interfacing between the 3.3-V PCI busand 3.3-V or 5.0-V back-end devices.
Fully optimized for a 0.35-(m, four-layer metal SRAM process, the EPF10K30A, contains 1,728 logic elements and 12,288 bits of on-chip RAM. With features like the continuous Fasttrack interconnect, the architecture allows for minimum die size.
The EPF10K30A device is supported by Altera's Max+Plus II development system for PC and workstation platforms. The software provides seamless integration with tools from Cadence, Mentor Graphics, Synopsys, Viewlogic, and other leading EDA vendors.
The EPF10K30A is available now in a 208-pin PQFP package and will soon be available in 144-pin TQFP, 240-pin PQFP, 356-pin standard BGA and 256-pin and 484-pin Fineline BGATM packages. By the end of 1998, volume pricing for the EPF10K30A is projected to be $15.00 in 25,000 unit quantities.
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