Sunnyvale, Calif.--June 15, 1998--Actel Corp. (Sunnyvale) announced a marketing agreement with Synplicity, Inc. (Sunnyvale) and Model Technology, Inc. (Beaverton, Ore.) to distribute FPGA Design Ultrapack, a FPGA design solution.
Ultrapack, a 30-day trial period CD-ROM, takes designers from synthesis to full design simulation, simplifying the development of HDL-based FPGA designs for programmable logical devices. The package is comprised of Actel's Designer Lite place-and-route software tool, Synplicity's Synplify synthesis design tools and Model Technology's Modelsim and trade simulation tools.
Ultrapack includes design components from Actel, Synplicity and Model Technology. Actel provides its Designer Lite series software, a package of free FPGA design tools supporting Actel's A40MX, A42MX, 3200DX, 1200XL, ACT3, ACT2 and ACT1 families. Synplicity adds Synplify 3.0c1, a synthesis tool that accepts industry-standard Verilog and VHDL description, delivers enhanced timing-driven synthesis with clock-speed specification, resource sharing, TCL scripting capability and output of VHDL, HDL Analyst and Verilog gate-level netlists. Also included is Model Technology's Modelsim 4.7 VHDL simulator, a simulation environment that enables designers to successfully design and debug high-performance FPGAs as well as high-density ASICs. In addition, Ultrapack contains Actel's VHDL and Verilog libraries and tutorial.
The free FPGA Design Ultrapack evaluation CD will be available via Actel's Web site.
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Sunnyvale, CA 94086-4533
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