San Jose, Calif.--July 20, 1998--Altera Corp. (San Jose) announced the development of its MAX 7000B family of PLDs. Developed using a 0.25-m (drawn) process and five-layer metal, the MAX 7000B family will offer the industry's first 2.5-V product term-based devices with unprecedented pin-to-pin delays, as fast as 3.5 ns. The family is comprised of seven devices, and is a functional superset of existing MAX 7000 families in macrocell count and pin compatibility. The MAX 7000B family is expected to further the already-broad acceptance of the MAX 7000 architecture throughout the industry.
All MAX 7000B devices will feature Altera's MultiVolt(tm) interface, enabling core operation at 2.5-Volts while allowing I/Os compatible with 3.3-V, 2.5-V, and 1.8-V logic interface levels. This will be key to the flow of designs to the new family. The lower core voltage is also expected to result in a 75 percent reduction in power consumption as compared to mainstream 5.0-V products. The MAX 7000B familywill support emerging I/O standards as well.
The MAX 7000B family, will be supported by Altera's MAX+PLUS II development system for PC and workstation platforms. The MAX+PLUS II software offers an architecture-independent development environment, which enables the designer to target designs to any of Altera's device families. MAX+PLUS II software provides integration with tools from Cadence, Mentor Graphics, Synopsys, Viewlogic, and other leading EDA vendors.
MAX 7000B devices are expected to become available during the first half of 1999. The first device to ship will be the EPM7128B. Pricing for the EPM7128B is projected to be $5.75 in high-volume production quantities. Packaging options will include Altera's FineLine BGA package, which will require less than half the board space of the standard BGA packages currently employed for PLDs. Other small form-factor packaging options are under development for design environments where board space is at a premium.
San Jose, CA
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