Redmond, Wash.--July 14, 1998--Chronology Corp. announced Motorola's participation in its Synchrony Program, enabling Motorola to deliver interactive design specifications for its MPC860 PowerQuicc processor family.
Developed through Chronology's Synchrony Program, the new component specifications enable design engineers to interactively evaluate timing and protocol for the MPC860 devices. System designers can use these specifications with Chronology's free TimingViewer product to enter their own design-specific values such as operating frequency and loading, and instantly see the effects on the interface timing for the MPC860 components.
The Synchrony Program promotes the development and distribution of interactive timing diagram specifications for complex IC and IP devices and represents the latest technology in digital component interface specification.
Motorola's embedded PowerPC microprocessor products have garnered more than 1,000 design wins. The MPC860 product line has recorded hundreds of design wins, proliferating in communications systems such as SOHO routers, remote access and telecommunications infrastructure equipment. The MPC860 PowerQuicc family is now offered at 33, 50, and 66 MHz clock speeds.
A free TimingViewer is available at: www.chronology.com/synchronypartner/index.html. Interactive timing diagram specifications and other product support materials for the MPC860 PowerQuicc family are available at: www.mot.com/SPS/RISC/netcomm/tools/index.html#ppc_group.
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