Wilsonville, Ore.--July 13, 1998--Mentor Graphics Corp. (Wilsonville)announced it has been awarded two U.S. patents (numbers 5,768,567 and5,771,370) on its coherent memory server technology, the key component of itsSeamless Coverification Environment design tool.
The inventions enable Seamless to execute anddisplay sufficient detail to detect design errors with respect to theexecution of the code on the hardware without compromising cosimulationperformance. They allow hardware and software designers topinpoint the precise ratio of performance to detail as desired. The inventions provide forreal-time alterations of the performance/detail ratio via user interaction, orunder program control based upon the conditions in the embedded software andhardware.
The patents, entitled "Method and apparatus for optimizing hardware andsoftware cosimulation" and "An optimizing hardware and softwarecosimulator," address a fundamental issue in creating aneffective virtual prototype of an embedded system. While embedded softwarecan be executed relatively quickly, the simulation of embedded hardware ismany orders of magnitude slower by comparison. Traditional coverificationmethods address this dichotomy by shielding the hardware simulator fromembedded software memory transactions, increasing performance, but seriouslycompromising the integrity of the coverification session. Memory operationsthat are skipped in the name of performance fail to detect design errors inthe memory sub-system of the embedded hardware. The inventions enableSeamless to execute and display sufficient detail to detect design errors withrespect to the execution of the code on the hardware, without compromisingcosimulation performance.
Mentor Graphics Corp.
8005 S.W. Boeckman Road
Wilsonville, OR 97070-7777
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