San Jose--May 26, 1999--Cadence DesignSystems, Inc. (San Jose) and Denali Software, Inc. (Palo Alto, Calif.)announced an agreement to integrate Denali's Memory Modeler and Graphical Memory Debugger with the Cadence Affirma family ofHDL logic simulators.
This integration allows mutual customers to generatecustomized memory models increasing functional simulation performanceof system-on-a-chip (SOC) designs.
The IEEE 1499 Open Model Interface (OMI) was chosen to link theMemory Modeler to the Cadence simulation products because of itsflexibility and extensibility. OMI allows model sharing at anylevel of abstraction and any OMI-compliant model can be executed onany OMI-compliant simulator regardless of the language the model iswritten in.
The Cadence(R) Affirma simulators have supported OMI-basedintegration within the Cadence design environment and for third-partytools since June 1997.
The Denali Memory Modeler will be integrated with the CadenceAffirma Simvision environment, which is the graphical user interfaceto the Cadence logic simulators. This will provide customers with asmooth integration flow and a uniform look and feel across Cadencesimulator products. Cadence customers can also use the Denali modelswith the Affirma HW/SW verifier to improveco-verification performance of hardware and software components.
The Denali Memory Modeler and Debugger are available at U.S. listprices of $5,000 and $7,000, respectively, and are availablefrom Denali Software.
Cadence Design Systems
San Jose, CA
Palo Alto, CA
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