AUSTIN, TexasIC characterization provider Silicon Metrics Corp. will roll out this week a product line based on its SiliconSmart Models. Included in the lineup is the company's first offering for logic designersa timing sign-off tool that can extend the accuracy of static timing analyzers.
Also part of the new line is a tool that generates Open Library API (OLA)-compliant SiliconSmart Models. Silicon Metrics claims these models use a dynamic approach that is more accurate than today's fixed, static models. The company also says its tools can replace commonly used Standard Delay Format (SDF) back-annotation flows.
Cellrater, the company's first tool, has been renamed SiliconSmart CR. The product promises accurate characterization for IC cell libraries. The new products are SiliconSmart OMC (Open Model Compiler), which generates models, and SiliconSmart TSO (Timing Sign-Off), which gives an accuracy boost to timing analyzers.
"The static, fixed model that is the standard format in the industry today has outlived its usefulness," said Callan Carpenter, Silicon Metrics president and CEO. "What you really need today is more accurate characterization, and you've got to mate that characterization with algorithms."
SiliconSmart Models offer an instance-specific operating point (ISOP) capability. That's important, Carpenter said, because two NAND gates on opposing sides of a chip could be influenced by thermal gradients, IR drop or cross-coupling. As a result, the sup-
ply voltages might be different, but
that would only show up with instance-by-instance modeling.
Additionally, SiliconSmart Models use a "selective refinement" approach to provide the best trade-off in performance and accuracy. A given model could include a table-based representation for the front end of the design process, a nonlinear ISOP model with resistance-capacitance delay calculation for back-end optimization and a self-characterizing model for use with timing sign-off. The ultimate level of accuracy is a full 3-D field solution.
To derive the benefits of SiliconSmart Models, users must first create them using SiliconSmart OMC, which, according to the company, is the first library compiler that generates OLA-compliant models. OLA is an emerging industry standard backed by the Silicon Integration Initiative (Si2).
The OMC tool can take input from SiliconSmart CR but doesn't require it. Other pathways into OMC include Synopsys' Liberty format, Advanced Library Format and Delay Calculation Language. The tool outputs OLA 1.1 and IEEE 1481 API-compliant models. For each generated model, OMC generates an automated verification test suite.
SiliconSmart TSO uses SiliconSmart Models to provide what Carpenter called a "Turbo boost" for existing static timing analysis tools. TSO is embedded in the tool and is run on specific paths that the user feels merit closer observation. TSO can select the appropriate level of abstraction or the user can make the decision, all the way down to a full 3-D field solver, if needed. There is a trade-off in run times vs. accuracy, though.
Carpenter said TSO can significantly boost accuracy by allowing back annotation of instance-by-instance characteristics. It also eliminates any need for SDF back annotation. TSO's output, said Carpenter, is "just a better set of ordered paths," reported in the same format as the host timing analyzer.
At present, Silicon Metrics is only announcing support for the timing analyzer within Cadence's Ambit Envisia synthesis suite. More critical is support for Synopsys, which leads in timing analysis and synthesis. Carpenter said it was premature to make any announcements but he noted that Synopsys is an investor in Silicon Metrics and that the two companies have been working together for over a year.
SiliconSmart OMC is available on Unix workstations starting at $250,000.
SiliconSmart TSO is scheduled for third-quarter release on Unix platforms starting at $175,000. Further information is at www.siliconmetrics.com.