SANTA CLARA, Calif. Designers must help solve the power consumption crisis for mobile devices and achieve a better rate of first-pass success with system-on-chip (SoC) silicon if those products are to flourish, according to speakers at this week's International Symposium on Quality Electronic Design (ISQED) conference.
Hajime Sasaki, chairman of NEC Electronics Inc., identified the present and expected rise in power consumption as a major factor in the future adoption of platforms for mobile communications. And Sasaki stressed his belief that mobile communications devices will soon supplant the PC as the main driver for growth in the semiconductor industry.
Mobile devices will also supplant the PC as drivers of new Internet applications, though the information technology and semiconductor industries seem ill-equipped to meet the power requirements of those products, Sasaki said. Over the last two years, over 30 million subscribers in Japan have gained access to the Internet through handheld devices, Sasaki said.
The power problems currently facing California will not remain limited to that region of the world, Sasaki suggested. Japan's current information technology power requirements hover around 42 billion kilowatts per hour, and is expected to rise to 330 billion kilowatts by 2010, which would equal the output of 30 nuclear power plants.
The requirements for success in the new mobile Internet-access era will differ from those required for the PC era, Sasaki said. "The PC era was based on high performance and low cost, coupled with chip-shrink methodology, whereas the mobile device market will need to really look to energy-saving components as a main factor for success," he said. Consumers should expect to operate the equivalent of a mainframe computer within the power supply constraints of a small battery, Sasaki said.
Requirements for success
In his talk, Joseph Costello, chairman and chief executive officer of Think3 Inc. (Santa Clara, Calif.), said design quality depends upon the correct combination of methodology, tools and people, and stressed the importance of first-pass silicon success. SoC is the fastest growing design segment, driven by the demands of the consumer-driven marketplace, Costello said. Therefore, price is paramount, and successful pricing in turn demands volume production, he said. "The consumer market is driven by what's fashionable and fickle, and it's going to stay that way," Costello said. Consequentially, product life cycles are short most hover around a year and this can hinder SoC design success. "First-pass success is critical, because if you don't meet this, then you must count on someone else [among your competition] screwing up," Costello said.
The so-called design gap is a particularly complex issue and represents, in part, the failings of the design community, Costello said. "This is more of a problem with supply than demand. It's how much you can put in a chip versus how much you're actually putting in," he said. "It's like the Hydra. You cut one head off and three more spring up. The smaller ICs get, the more problems you have because you have to start dealing with physics as compared to just treating things as black boxes."
Fear and greed are huge motivators in producing successful, quality designs, according to Costello. "[To succeed] you must have a combination of methodology, people and tools, in this order of importance. Like a war, you have to map out your campaign with complete clarity and it's in high-end design where we attack these problems first," he said.
Michael Maisen is senior editor of Integrated System Design, a sister publication of EE Times.