SAN MATEO, Calif. Michael Stabenfeldt, a chip designer and tool architect who has had a long and controversial career developing tools for companies like Cadence and ArcSys (now Avanti Corp.), has quietly been gaining a solid reputation among designers with his IC mask layout editor.
Stabenfeldt is the sole employee of Austin, Texas-based Stabie-Soft, which offers the $5,000 Slam-Edit mask-level layout editor, a $100 Slam-View layout viewer and numerous add-ons to the Slam line of tools. He gained the nickname Stabie during his years at TRW, where he was a VLSI designer and architect of wafer-scale design tools.
Stabenfeldt helped create the Virtuoso layout editor for Cadence Design Systems Inc. in the late '80s before he jumped over to place and route startup ArcSys in mid 1991. As ArcSys' seventh employee, Stabenfeldt was in charge of the Foundation group and was tasked with fixing the infamous database code stolen from Cadence Design Systems in early 1991. Stabenfeldt appeared as a witness for Avanti in the People v. Avanti restitution hearing but was never in jeopardy of being linked to the crime, since the code had been stolen and edited months before he arrived.
Stabenfeldt, who left Avanti in late 1995, created Stabie-Soft after a few years as a consultant. His first product, Slam-Edit, was introduced in 1998 as a low-cost, faster alternative to popular commercial layout editor tools.
"It is much cheaper than competing tools, runs under Linux, has equivalent functionality and runs anywhere from five to 30 times faster than competing packages," said Stabenfeldt.
He said he is developing a bridging software tool that links Silicon Perspective's placer with Plato's Nano-route router. "I originally created the tool thinking it would be a good replacement for the front end of Cadence's Silicon Ensemble, but Banderacom, the first customer testing it in beta, is using it for the SP-to-Plato flow," he said.
Stabenfeldt said the tool, under the proposed name Strategy, works with industry-standard LEF and DEF files. Implementing the tool as a bridge in the SP-to-Plato flow, users read in Verilog in Silicon Perspective's First Encounter to determine the size of the die and where elements will be placed. Users then run placement with First Encounter.
Strategy reads the DEF file generated by First Encounter and performs power and ground routing. The tool then returns the DEF file containing power and ground route congestion modifications back to First Encounter. That tool performs placement again, and the DEF file is passed to Plato's Nano-route for detailed routing. The routed DEF file is passed back to Strategy, where the design can be streamed out for verification.
Stabenfeldt said the technology should be ready for release by the end of August and will likely be priced around $15,000.