SAN JOSE, Calif. The Open SystemC Initiative (OSCI), a non-profit organization backing SystemC as a future hardware/software IC design and verification language, wants to cement itself as a viable language for large silicon platforms and SoCs.
This week the company appointed its new officers who intend to legitimize the language by submitting the latest version of SystemC, 2.0.1, for IEEE approval.
Guido Arnout, chairman of CoWare who is OSCI's new president, said the SystemC language has emerged from its incubation period and has become a solid language that architects are using now to create full systems with hardware and software.
"I said many years ago that a system is composed of software running on hardware platform," said Arnout. "In the hardware design world folks don't like to think of it that way, but in truth software is huge part of SoC design the biggest part. I know one company in Japan that uses 3 million lines of software for its cell phones."
Arnout said the language is being used to design products. "It is in use today and customers have used it to design real chips," he said. "EDA companies support the language, and now we want to see it grow in adoption and become approved by the IEEE."
The language has been pegged largely by hardware designers as an inferior competitor to SystemVerilog, which with the backing of Synopsys is going through rigorous approval at the standards group Accellera. It would then be the next hardware design language above Verilog and VHDL.
OSCI's Board also includes Accellera chairman Dennis Brophy, director of Strategic Business Development at Model Technology.
Arnout said he and Brophy are not at odds in terms of next generation design languages and have coauthored an article on how SystemC and SystemVerilog can co-exist.
Also remaining on the OSCI board is Takashi Hasegawa, project manager for the SoC design solution department at Fujitsu. He remains OSCI's chairman.