PHOENIX, Ariz. The "tyranny of interconnects" is threatening the timing, power, and cost of next-generation chips, according to James Meindl, director of the Microelectronics Research Center at the Georgia Institute of Technology. At a keynote speech at the International Symposium on Physical Design (ISPD '04) here, Meindl presented leading-edge research in electrical, optical, and thermal interconnects.
Meindl said that interconnect has become the deciding factor with respect to the latency, energy dissipation, and masking levels of chips. At 100 nm, he noted, the intrinsic switching delay of a MOSFET is 5 ps., whereas the RC response time for 1 mm of interconnect is 30 ps. At 35 nm, this 6-to-1 differential turns into a 100-to-1 difference.
At 100 nm, Meindl said, interconnect switching energy is five times that of MOSFET switching energy. At 35 nm, interconnect switching energy is 30 times greater. At 100 nm, he added, 8 to 20 masking layers are required for transistors, compared to 18 to 24 for the fabrication of interconnects.
"We have entered the interconnect era," Meindl said. "What can be done to suppress the tyranny of interconnects?"
Meindl reviewed a number of solutions that are coming from the Interconnect Focus Center, a DARPA-funded project headquartered at Georgia Tech. The project, he noted, involves 12 universities, 60 faculty, and 133 graduate students.
There are two drivers for the project, he noted. One is a 40 terabit/second computing and communications chip with over 1,000 channels of optical interconnect. Another is a low-energy, mixed-signal wireless node that integrates diverse process technologies.
In the area of electrical interconnect, Meindl said, researchers are looking at carbon nanotubes. These, he said, exhibit low resistivity, small dimensions, high current densities, no electromigration, and high thermal conductivity. Researchers are currently trying to control the placement of carbon nanotubes. Other areas of electrical interconnect research include bio-engineered molecular wires, and "spintronics," which provides signal transmission through injection of spin-polarized packets of electrons.
Research in optical interconnects includes a variety of exotic new techniques. Meindl said that optical clock injection using short pulse lasers can provide low-jitter, high GHz clocks. Other areas of research include CMOS-compatible germanium photo detectors, truncated quantum dot lasers, and monolithically integrated vertical cavity surface emitting lasers (VCSELs).
Meindl also outlined "thermal" interconnect schemes, including the use of thermofluidic microchannel modules bonded onto a chip or placed between layers. Microchannels can use cryogenic cooling, pumping liquid air into the chip to take heat away from electrically active components.
"The overarching challenge of the interconnect era is to provide a hierarchy of electrical, optical, and thermal interconnect solutions," Meindl said.
In response to a question, Meindl said that the first use of carbon nanotubes will probably be as substitutes for copper interconnect for short and intermediate interconnects. Optical interconnect, on the other hand, will probably be first used for chip-to-chip communications, and later on be used globally within chips.
The ISPD '04 conference, which runs April 19-21, brings together experts from industry and academia in IC physical design.