Mentor Graphics has developed an interactive version of its Calibre design-rule checking (DRC) software to address analogue and memory designs, using more precise rules to identify common design problems.
Joe Sawicki, general manager of Mentor's Calibre business unit, said: "In logic, you are just looking for switches. In analogue and DRAM, you need to extract much more detailed effects, such as the length of a switch or serpentine effects. There are many tools out there for logic but most are not able to handle the analogue environment."
Sawicki said the move to analogue DRC requires a change in the way design data is handled. The conventional batch analysis of the logic environment would not work in practice because waiting for DRC until after chip assembly would let problems go unchecked.
"You need a deeply interactive version," said Sawicki.
In common with a number of analogue and cell analysis tools, the company decided to plug the interactive version of Calibre into Cadence Design Systems' Virtuoso layout editor, rather than create its own viewer.
"If you have two environments, people get semi-trained on both but are not fully effective on one," said Sawicki.
"We have worked very closely with the foundries on design rule kits. If customers run a Calibre rule deck, it's the same one that they use at the foundry."
The company has built rule decks for TSMC and UMC processes.