Low cost and flexibility are keys to designing a successful platform for today's car multimedia system. A range of features can be assisted by voice recognition and speech synthesis, including video and high-end audio entertainment, wireless links to traffic information and e-mail and global positioning/navigation. When it comes to car multimedia, it is not yet clear how much consumers are willing to pay and for what, so manufacturers are understandably cautious about committing engineering and production resources. Consequently, the best platform for today's car multimedia system developers is one that can be built from relatively low-cost components, and is easily scaled up from a bare-bones configuration to a high-end system.
Minimally configured, a car multimedia system adds color graphics to the more conventional monochrome display of characters and symbols found in the latest entertainment and information systems. For example, enhanced with a color graphics display, navigation systems can present maps showing present location and suggested routes to a destination. More sophisticated systems would add voice recognition and speech synthesis, real-time traffic reports, e-mail and, ultimately, with the addition of rear compartment displays, movies and games to entertain back-seat passengers.
However, given the untested market for car multimedia, any one chip set at the heart of a system must serve as many different equipment manufacturers as possible. Excessive risk and high cost make developing a proprietary platform an unwise choice. Instead, a popular and widely supported microprocessor-one that also rises to the system's high computational demands-makes the most sensible cornerstone for a low-cost yet scalable platform on which to build a car multimedia system. In that way, equipment manufacturers, though ordering chips in volumes of just a few thousands, would nevertheless benefit from the economies of scale of a processor that sells in the millions.
Additional savings as well as easy scalability require that as many functions as possible be delegated to software modules. The processor's computational muscle and, in particular, its capacity to run digital signal processing routines-even switch tasks are interrupted and swapped-is key. As a gauge for the level of processing power needed, some typical computational loads are 40 Mips for Dolby AC-3 sound, 10 Mips for graphics equalization, 10 Mips for FM stereo separation and 26 Mips for global positioning computations, when assisted by a separate GPS front end. Everything considered, nothing less than a high-end 32-bit MPU would be adequate.
Although the platform relies on the host MPU to tackle a significant share of the computational work load, some tasks need to be delegated. They are divided among other devices, including a companion "south bridge" chip that connects to the MPU across the PCI bus and that provides a rich set of interfaces between the platform and the outside world. In addition, a GPS processor would deliver location coordinates based on received satellite data. Other hardware modules can be added to handle optional features but, where possible, any functions that can be executed in software by the MPU should be.
Another important criterion of the MPU is that it execute its program directly from flash memory rather than from DRAM. Executing a flash-based program in place reduces the amount of DRAM needed and, therefore, system cost. However, because of the flash memory's inherently long access latency, in-place program execution makes it essential that a separate, dedicated data and address bus connect the MPU to the flash memory.
Lacking that bus, the system's real-time operating system-a key component for balancing computational resources across the different loads-will not respond quickly enough to changing system demands. In contrast, with separate buses achieving the benefit of near simultaneous DRAM and flash memory cache refills, the operating system can balance the system's tough performance demands against available processing capacity.
In addition to the work done by the MPU, its operating system and any supplementary controllers, the companion south bridge ASIC translates commands received from the MPU to a variety of interfaces and control buses. To achieve the desired system flexibility, the ASIC should be equipped with as many different interfaces as might be needed, including I2C, I2S, SPI, UART, J850, CAN and an 8-bit port to accommodate emerging fiber-optic interfaces. Although some of those interfaces could, in theory, be made part of a larger chip that includes the powerful processing core, that approach would limit the high-end MPU's appeal in other applications, an important requirement for keeping down the cost.
Another cost-saving requirement for the platform-one also achieved by the companion ASIC-is compatibility with legacy functions associated with the AM/FM radio and CD player. Folding these functions into the platform does more than reduce the multimedia system's overall hardware costs by eliminating the need for separate boxes: It gives access to FM sideband services for delivering traffic information and e-mail. Yet another important consideration is the ability to connect to other consumer information appliances, such as PDAs and notebook PCs.
At STMicroelectronics, such a platform is in design-to be built around the ST40, a powerful 32-bit RISC multitasking, multimedia engine using the SuperH Consortium's popular SH4 core. Thanks to several buses and interfaces, the MPU delivers 230 to 360 (Dhrystone 1.1) Mips and 0.9 to 1.4 Gflops. An added advantage to using the ST40 over a dedicated DSP chip is being able to swap digital signal processing tasks, saving and restoring states as needed.
The platform's second chip, the MPU's companion south-bridge ASIC, contains peripherals and interfaces specific to a car multimedia system, leaving the MPU well-suited for other multimedia applications. Packed into the ASIC are a PCI interface for connection to the MPU, two UARTs, six I2S interfaces, two USB interfaces, an enhanced IDE for accessing DVD and other mass storage for movies and map data, CAN and GPS interfaces, and a multimedia bus interface for driving a color graphics display. Other interfaces, such as J1850, are candidates for the future ASICs.
Moreover, to skirt concerns arising from the use of copper cable, including EMI/RFI and weight issues, the south-bridge ASIC carries an 8-bit interface that can adapt to emerging automotive fiber-optic buses like D2B, MOST and the 110-Mbit/s MML audio/video bus. By incorporating a generic interface that takes raw data from a fiber-optic translator, the ASIC remains uncommitted to any one specification. Yet in many cases, the fiber-optic interface can be implemented with few, and in some cases no, glue logic. At the same time, STMicroelectronics' role as head of the Ertico committee (ITS Europe) exploring automotive fiber-optic standards ensures access to the latest developments. That means quick availability of silicon once a standard emerges.
STMicroelectronics has also used the Euterpe Digital Voice Processor DSP speech-recognition, text-to-speech software developed by Lernout & Hauspie and noise- and echo-cancellation software developed by NCTI. Euterpe is an embedded system-on-chip solution that includes a powerful digital signal processor core optimized for audio applications, A/D converters, an external memory manager and an I2C interface for communications.