Changing standards for time-division-multiple-access cellular and personal communications systems are toughening RF requirements and making handset design more demanding.
The architecture and main design trade-offs for a typical dual-band TDMA transceiver RF section require an understanding of those changing North American Digital Cellular Standards as well as various integration approaches. There will be a substantial impact on three critical design variables-cost, size and power consumption.
Basically, those systems are evolving toward multiple bands and data rates. The TIA/EIA/ANSI-136 standard is applicable in the North American market for dual-band TDMA-based handsets for cellular and PCS. Now the standards are being upgraded to provide a smooth evolution into the future third-generation (3G) line of wireless data and voice terminals. Anticipated specifications include multimedia capabilities and services like wireless Internet access. That added functionality translates into the need for higher bit rates and increased RF bandwidth.
Mobile station transmission frequency bands are 824.04 to 848.97 MHz for cellular and 1,850.01 to 1,909.95 MHz for PCS. The receive section operates in the 869.04- to 893.97-MHz range for cellular and in the 1,930.05- to 1,989.99-MHz range for PCS.
The present RF channel bandwidth is 30 kHz; there are plans to extend it to 200 kHz and even 1.6 MHz. The 200-kHz bandwidth will feature higher-order digital modulation schemes like 8-PSK (phase shift keying) to make it compatible with future generations of TDMA-based GSM EDGE data-capable handsets (e.g., Global System for Mobile Communications, Enhanced Data through GSM Evolution handsets).
Before 1983, the U.S. cellular system consisted of FM-based single-band analog designs. Now, there are dual-band trimode capabilities (analog in cellular band and digital in both cellular and PCS bands). The new standards set the requirements for multiband, multibandwidth and multitime-slot operation that will lead to more complex mobile and basestation designs. Most of the future handset designs for the U.S. market call for dual-band operation (824 to 894 MHz in cellular band and 1,850 to 1,990 MHz in the PCS band).
Essentially, there are several RF specifications for a dual-band TDMA-based handset. The transmitter output power level for a Class IV handset is not to exceed 600 mW effective radiated power referenced to a half-wave dipole. Error vector magnitude (EVM) is a quantitative indication of the quality of the digital modulation. The EVM rms value is specified to a maximum of 12.5 percent.
The adjacent (fc = 30 kHz)/alternate (fc = 60/90 kHz) channel-power-ratio specifications reflect the transmitter's linearity (adjacent channel power ratio (ACPR). Emission power levels should not exceed -26 dBc and -45 dBc, respectively. The receiver sensitivity has to be at least -116 dBm in analog mode (for 12 dB Sinad) and-110 dBm for 3 percent bit error rate (BER)in digital mode (in static conditions). The maximum input level specification is -25 dBm for 3 percent BER.
Meanwhile, the RF module's basic objectives are to modulate high-frequency RF carriers with the analog and I/Q digital signals coming from the handset's baseband section and to demodulate the received analog and/or digitally modulated RF signals.
Four functional sections can be identified in a typical dual-band RF module: the front end, the receiver, the frequency synthesizers and the transmitter. The front-end section and a common antenna provide receive and transmit operation in both bands. Design compromises for dual-band operation focus in the antenna gain, the radiation patterns and in a common matching network.
There are switches within the front end. The diplexer separates the cellular and PCS bands, while the duplexer separates the transmit and receive sections. This leads to different frequency selectivity requirements-insertion losses, size and cost.
Basically, the duplexer prevents transmitter noise in the receive band from desensitizing the receiver in full-duplex analog mode and in future digital mode, multiple-time-slot operation. Also, it attenuates the receiver's spurious responses (first image, half-IF and others), the transmitter output harmonics and other undesired spurious products.
The receiver's (broadband) frequency selectivity is shared among the duplexer and the following image filters. Trade-offs appear in terms of size and insertion loss. A transmit-receive (T/R) switch is provided for digital-mode nonsimultaneous transmit and receive operation in the PCS band (half-duplex mode).
The cellular handset receiver design is based on a double-conversion super-heterodyne architecture that provides the high dynamic range and selectivity required for this application at a relatively low cost.
The biggest design trade-off in the receiver is the choice between discrete and integrated front ends (low-noise-amplifier-LNAs-mixer and local oscillator-LO-buffers). The discrete option allows the designer to tailor the gain, noise figure (NF), third-order input intercept point (IIP3) and power consumption for optimum performance at the expense of increased parts count and size. Placement of components on printed-circuit boards also becomes more flexible in a discrete design approach. An integrated RF ASIC reduces development time but final cost may be higher because of lower RF IC yields, packaging, RF isolation and testing problems.
Other receiver design trade-offs include RF gain distribution, which is implemented to achieve the optimum dynamic range (IIP3/NF trade-off). However, a higher IIP3 leads to higher current consumption (shorter standby time). Strong signal performance is of paramount importance in a mobile cellular environment.
The use of shared components in both frequency bands reduces parts count, size and cost. However, that increases the difficulty of optimizing the performance in each band independently.
Two basic receiver architectures are available: direct conversion (or low IF) and super-heterodyne. The former basically eliminates the IF stages, mixers, filters and associated local oscillators, providing the flexibility to accommodate different bandwidths and standards. Also, direct conversion has potential advantages in terms of reducing cost, pc-board real estate and power consumption; however, its present performance for TDMA applications (based on the pi/4 Differentially encoded Quadrature Phase Shift Keying-DQPSK-modulation format) lags behind the time-proven super-heterodyne topologies that allow excellent dynamic range and selectivity, with shorter and less risky development cycles for a given level of performance. The disadvantages of the super-het approach include a high parts count and integration difficulties because of the high-Q filters that should be placed off-chip. The first IF filter also contributes to the adjacent/alternate channel attenuation and determines the second image rejection.
A practical direct conversion approach requires the efficient resolution of several matters. Among them are time-varying dc offsets, LO leakage through the antenna, gain/phase matching and second-order nonlinear distortions in the down-converting quadrature mixers, and proper operation under the TDMA dynamics.
Many factors determine the handset receiver and transmitter optimum "frequency plan." From the receiver standpoint, the goal is to keep receiver spurious responses far away from the passband (easier to attenuate); this strategy leads to simpler, less expensive and smaller front-end filters with lower insertion loss. A higher first IF simplifies the first and half-IF image rejection, but a larger and more expensive IF surface acoustic wave (SAW) filter might be required.
Readily available standard parts like filters and voltage-controlled, temperature-compen-sated crystal oscillators (VC-TCXO) usually lead to a lowercost solution. The frequency plan also affects the level of transmitter output spurious products and the associated filtering requirements.
A VC-TCXO generates the reference frequency for the RF module frequency synthesizers. Four different frequencies must be generated for the generic architecture. The receiver (and transmitter) first UHF LO must be tunable in 30-kHz frequency steps. Its phase-locked loop (PLL)-based approach features a switchable dual-band VCO. It must provide a fast lock-in time (fewer than 2 ms) with very good phase noise and low spurious levels. Its performance affects the transmitter's EVM and the receiver Alternate Channel Selectivity, among other key specifications. The other fixed-frequency synthesizers provide the receiver's second and third LO and the PLL-based transmitter's IF offset VHF LO.
The choice of frequency synthesizers also involves trade-offs. Different PLL loop bandwidths and charge-pump output currents are necessary in analog and digital modes and in cellular and PCS bands to obtain the best possible performance. The loop filter transfer function is one of the critical factors that defines the loop bandwidth as well as the compromise between the SSB phase noise profile (or RMS phase error), the spurious levels and the lock-in time. The optimum loop bandwidth is determined by a careful trade-off among all of the above factors.
For the transmitter section, an indirect quadrature modulator is shown to perform the RF carrier modulation by the in-phase (I) and in-quadrature (Q) baseband input signals and further upconversion to the output transmit frequency. The transmit path's SAW filters reject spurious frequencies and attenuate noise in the receive band. The power amplifiers provide about +30 dBm in both bands. On-chip output matching networks save pc-board space at the expense of some additional cost.
The automatic power-control loop keeps the output power levels within the tolerances prescribed in the standard (within +2,-4 dB for the eight upper output power levels). The isolators prevent potential damage to the power amplifier (PA) under antenna-induced high-VSWR conditions and ACPR degradation caused by reflected RF energy.
Several needs must be considered in the selection of both the architecture and parts in the transmitter. For example, very strict linearity requirements in digital mode (ACPR) conflict with a power amp high-power- added-efficiency.
Besides those needs, the PA selection process must factor in the need to use or not use a MOSFET drain/collector switch, a Vgg negative supply voltage generator for GaAsMESFET/pHEMT devices as opposed to single-supply devices like GaAs heterostructure bipolar transistor.
In certain cases, future General Packet Data Radio Services with multiple-time-slot data operation will need extended PA duty cycles with a corresponding power-consumption rise. That need will affect the wireless data terminal's battery life and attention must be paid to the packaging and related thermal concerns.
Three new TDMA standards are anticipated: TIA/EIA/ANSI-136 Revisions A and B and the Universal Wireless Communication Consortium Standard UWC-136. Future TDMA standards will require multiple-slot, multiple-bandwidth operation. Spec- trally efficient digital modulation schemes such as 8-PSK and others will be employed.
Channel bit rates will be 72.9 kbits/second in 8-PSK (maximum for 30 kHz channels) as compared to the existing 48.6-kbits/s bit rate for /4 DQPSK modulation (50 percent increase). This new performance translates into a 43.2-kbit/s user information bit rate for triple-time slot operation.
TDMA6 half-rate programs are targeted to allow 6x Advanced Mobile Phone Service, analog mode (AMPS) by means of 8-PSK modulation. Different vocoders to do this job are being evaluated.
Longer talk times will be pursued though discontinuous transmission (DTx) techniques
in the absence of speech. Better quality of service will be achieved through enhanced mobile assisted handoff and channel allocation (MAHO/ MACA) approaches, using BER, carrier-to-interferers ratio (C/I) and receive signal strength (RSS) extended-measurements capabilities in the mobile station.
Expect the next generation of transceivers to be capable of generating and demodulating 8-PSK signals as discussed. Future 8-PSK modulation and demodulation requirements will translate into new requirements in the areas of receiver static and faded sensitivity, intermodulation, spurious responses, cochannel and delay interval BER and transmitter EVM requirements. Different PA linearity vs. efficiency compromises will be a function of the employed modulation schemes.
The UWC-136 HS proposal (High-Speed Data) is designed to meet the International Telecommunications Union's IMT-2000 3G requirements. This proposal defines approaches to achieve high-speed data transfers ranging from 64- to 384-kbit/s channel bit rates on 200-kHz-spaced TDMA carriers for outdoor and vehicular services, and 384 kbits/s to 2 Mbits/s (and higher) on 1.6-MHz-spaced TDMA carriers indoors.
For RF modules, integration efforts are being carried out in several areas. These include integrated dual-band receiver front ends, dual-band power amplifiers in the same package, transmitter I/Q indirect modulators, voltage gain-controlled amplifiers and PA drivers, and dual synthesizers on the same chip.
A fully integrated solution-receiver-synthesizer and transmitter in a single ASIC with the possible exclusion of the PAs and LNAs-is not the best approach. A set of two RF ASICs is a more effective and versatile solution than the "radio-on-a-chip without passive parts." Board layout routing becomes less difficult in a properly partitioned transceiver and simplifies addressing critical RF isolation and shielding problems during the RF module integration stage. Also, lower-risk development cycles are achieved. A two-chip approach would incorporate a single ASIC for the receiving section only that can be replaced for a direct conversion-type architecture in the future. And a second IC would provide the frequency synthesizers and transmitter functionality.
A very large number of passive parts is found in present transceivers-there are more than several hundred for a typical dual-band TDMA RF module. Clearly, further integration requires solving the passive-parts integration problem in a cost-effective manner that is compatible with the present short development schedules.
Several manufacturers are striving to reduce the packaging size of VCOs, filters, isolators and SAW duplexers. They are also trying to reduce the footprint of standard components like resistors, capacitors and inductors. Many 0603 package sizes were shrunk to 0402 and some were shrunk to the microscopic 0201 size (0.5 x 0.25 mm). In the foreseeable future, this will be the most viable approach to shrinking the RF module's footprint.
MEMS on the move
Looking further into the future, promising developments have been reported in the areas of low-temperature-cofired-ceramics (LTCC) RF modules and microelectromechanical devices (MEMs) that incorporate high-Q filters and RF switches.
The most effective solution is a moving target: It will be a combination of forthcoming new standards requirements, transceiver architectures and the availability, performance and cost of new active and passive parts. Wider-bandwidth services, higher integration, lower power consumption, lower cost and better performance will ensure that the RF design of future TDMA handsets will remain ever more challenging.
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