As a specification for small form factor, low-cost, short-range radio links between mobile voice communications and computing devices, Bluetooth is anticipated to create a $500 million chip market by 2004, according to market research firm Strategies Unlimited. Philsar Semiconductor, now a member of the Wireless Communications Division of Conexant, defines the Bluetooth market according to personal wireless connectivity (PWC) segments. PWC is a wireless paradigm that allows for the network to be intuitively based on the end user, providing an unparalleled degree of personal connectivity via wireless communications. Cellular handsets, accessories such as headsets, as well as notebook computers and personal digital assistants are just a few of the applications that Bluetooth will integrate in piconets of PWC.
The universal standard of connectivity that Bluetooth provides will drive the development and broad market acceptance of these and other PWC applications. Philsar's position is that one key success factor of PWC is a high degree of robust performance.
Robustness refers to the ability of a system to operate in a non-ideal environment consisting of potentially many other signals (blockers) and experiencing rapidly changing received signal levels. Difficulties associated with these issues are addressed in the following sections.
Dealing with the power spectral density of a Bluetooth signal can be tricky. A typical waveform for an FSK pager's Bluetooth signal could be, for example, a large modulation index FSK spectrum of 15 dB in power spectral density at its center, while the low modulation index Gaussian FSK has its peak power spectral density at its center.
This peak in the signal power for the Bluetooth signal occurs exactly at DC for receiver architectures based on direct downconversion. As a result, direct downconversion architectures have to deal with on-chip DC offset problems.
The most severe source of DC offset arises from the second-order distortion products from any blocker (jammer) falling in-band.
As a result of the Bluetooth spectral shape, it is not possible to simply use blocking capacitors in the receiver path without greatly disturbing the received signal. It is possible to provide DC compensation circuits to adaptively tune out any DC offsets due to a blocker, before the start of a receive packet. However, this is extremely difficult to do in circumstances where a blocker appears midway through a receive packet. Note that the blocker need not be even in the adjacent channel to completely disturb the received information.
Spectral congestion is another issue to consider. Whereas the pager environment enjoys large guard bands between channels, the Bluetooth environment is extremely crowded, with channel spacing equal to the modulation rate. This crowding results in overlapping power spectral densities, which requires extremely difficult filtering to achieve robust performance.
In addition to having a crowded spectrum, the blockers (jammers) with which a Bluetooth transceiver must operate can have powers of 0 decibels, 30 dB and 40 dB stronger than the desired signal, at frequency offsets of 1, 2 and 3 MHz, respectively. Further, the Bluetooth receiver must operate satisfactorily in the presence of a co-channel blocker having a signal strength of -11 dB with respect to that of the desired signal.
The Bluetooth receiver must not only be able to respond to fading channel levels for each individual received signal, it must also respond, packet by packet, to different received signals. These different signals may have received power levels anywhere within a 50-dB dynamic range. As a result, the receiver must have a rapid AGC response time.
Philsar's PH2401 addresses these issues with a highly integrated radio architecture. It incorporates a highly flexible receiver architecture with interleaved filter and AGC stages, rapid AGC, excess gain availability and gain-location management. It also eliminates the use of high 1-dB compression point circuits such as the image-reject downconverter, back-end filter stages and ADCs in the receiver, and the traditional upconverter/filter chain in the transmitter.
The interleaved filters and AGC stages progressively attenuate adjacent-channel blockers while boosting the desired on-channel signal, without hitting the 1-dB compression point of any of the stages. The AGC allows operation through a rapidly changing received-signal strength, while the excess gain available allows operation within a fade. The gain-location management allows gain to be increased at the front-end stages to establish noise-figure when no blockers are present, or to be decreased to avoid compression when blockers are present.
The relaxed 1-dB compression-point requirement for the receiver image-reject down-converter, back-end filter stages, and ADCs is a consequence of the use of complex filter/rapid AGC stages feeding a complex PLL demodulator The complex filter stages possess a pass-band at the positive component of the center frequency of the IF, but strong attenuation at the negative component of the center frequency. This greatly relaxes the image-rejection requirement on the preceding downconverter. Further, since the filter stages are complex, the required number of cascaded filter stages is reduced by a factor of two. As a result, the back-end stages are not required to handle as high a level of signals as a receiver using twice as many stages of real filters does.
Finally, the rapid AGC stages compensate for signal fluctuations resulting in a reduced dynamic range requirement for the ADCs, which also saves current.
The complex PLL demodulator allows the PH2401 receiver to operate robustly with remote transmitters that are operating off-frequency, or with an incorrect modulation index. In comparison, the PH2401 transmitter will never operate off-frequency or with an incorrect modulation frequency, since it is based on a delta-sigma fractional-N frequency synthesizer.
The elimination of the transmitter upconverter/filter is a consequence of the use of a delta-sigma fractional-N frequency synthesizer in place of a traditional modulator upconverter. By using two-point modulation with this synthesizer, 1 Mbit/second Gaussian FSK modulation is achieved with a 10-KHz loop bandwidth. This improves system performance by achieving superior phase-noise and spur levels.
The result of the various architectural realizations is a Bluetooth transceiver that can operate in both a highly jammed and a rapidly changing received-signal strength environment. In particular, the PH2401 will operate reliably in the presence not of just one other blocker, but in the presence of many other simultaneous IMS emissions.
The promise of Bluetooth and PWC will be realized through the delivery of real-world performance parameters that consumers have come to expect in existing point-to-point wireless communications. By their very nature, applications such as mobile handsets and headsets, as well as mobile computing, will require a high degree of robust performance. Central to the achievement of Bluetooth-based piconets is the delivery of this attribute at the silicon level. The Philsar Semiconductor PH2401 family provides a Bluetooth-specific architecture that provides robust performance.