Until recently, videoconferencing was limited to professional use and has been largely based on expensive equipment utilizing ISDN communication channels. Further, from a design point of view, these systems have typically been based on rigid hardware designs, slowing their development and limiting their feature set.
Thus, system designers have not had the luxury of scalability and flexibility crucial today to meet the growing consumer demands for more functionality from newer generations of consumer electronics products. For example, with conventional hardware-based solutions, it is difficult to develop a scalable line of products that can support feature sets from standard telephone functionality, consumer videophones, business videoconferencing and video surveillance.
Today, however, there are technology trends toward lower cost, highly compact, multimode, multifunction videoconferencing for the consumer, thanks to programmable very long instruction word (VLIW) media processors, such as the TM32A core. When used with supporting software libraries, these processors offer the design flexibility required for scalable solutions.
The global software architecture serves as the foundation for a low-cost consumer videoconferencing system design based on a programmable VLIW media processor. In this design, the VLIW media processor executes software libraries implementing the H.324 videoconferencing software stack. These C-callable modules provide enhanced H.324-compliant videoconferencing functionality over plain old telephone service (POTS) lines. Further, these software modules provide a seamless environment in which to develop both standalone and host-based videoconferencing products based on this VLIW media processor.
The H.324 standard, defined by the International Telecommunications Union (ITU), specifies how videoconferencing systems should connect, compress and decompress audio and video data, and communicate using commodity modems. In this design, the TriMedia H.324 application libraries implement the features and interoperability specified by H.324.
These libraries provide developers the functionality required to incorporate the H.324 standard into their videoconferencing products. The C/C++ programmable media processor has the added design benefits of fast feature development and improved code efficiency and reusability. In this design, thanks to the programmability of the processor, video or audio codecs can be updated or replaced as needed and library modules can be updated to comply with new or evolving standards when they are available and accepted.
Based on this H.324 application, programmers can build cost-effective videoconferencing products with optional features such as acoustic echo cancellation, video prefiltering and deblocking filtering. The support for full-duplex acoustic echo cancellation (AEC) enables developers to build videoconferencing products that deliver the same echo-free, hands-free performance previously found only in high-end audio speakerphones. Video deblocking filtering can be used to smooth the block boundaries of the 8 x 8 macroblocks. Designers are free to develop and implement their own algorithms due to the programmable nature of the system. This also applies to prefiltering of video, which can be used to reduce noise in the image, improving compression.
The programmability of the processor allows the system engineer to design a family of videoconferencing or video phone system products. A basic design in this case can be transformed into different implementations via supporting software and additional daughtercards that can provide different networking support, for example. Consider a basic POTS implementation utilizing a V.34bis modem. The line interface (LIF) contains the audio and telecom subsection of this Web phone. It connects to the analog public switch telephone network (PSTN) and to an audio loudspeaker, microphone and a handset. The LIF also includes the coder/decoder (codec) to convert the analog modem signals to digital format required by the synchronous serial interface (SSI).
The SSI unit interfaces to an off-chip modem analog front end subsystem, network terminator, AD/DA or codec through a flexible bit-serial connection. The hardware performs full-duplex serialization/deserialization of a bitstream from any of these devices. Any front-end device connected here supports the transmission and reception of data and initialization via the SSI. The SSI unit supports a wide range of modem, network and/or fax protocols. The reason is that the communication algorithm is implemented in software by the media processor and the analog interface is off-chip.
For example, to change this application from a consumer videoconferencing system to a professional videoconferencing system, the system designer replaces the V.34 interface to an ISDN connection. Also, the designer and developer change the software from H.324 for consumer videoconferencing to H.320, which is the standard for professional videoconferencing. Further, if a design calls for an Internet connection, the designer can use an Internet/Ethernet connection by implementing an H.323-based daughtercard with supporting software. All along, the basic design remains the same with daughtercards and software being used to create the different product variations.
Business videoconferencing and consumer video-phone designs differ because there is considerably more movement in videoconferencing than there is in video phones. Videoconferencing typically involves a group of people in a room where the camera can pan and zoom. Video phones usually involve a single person in front of a camera interacting with family or friends. Hence, a video phone can have acceptable movement with less than five frames per second. On the other hand, the system designer must achieve at least 15 frames/s for videoconferencing. With this programmable media processor-based design, the system designer and developer can perform necessary trade-offs between picture quality and the number of frames/s. The limitation is not the processor in this instance, but rather the communication bandwidth between systems.
Here is where scalability comes in to provide the designer the necessary extra design latitude to give the consumer more functionality. Video codec scales from 20 kbits/s up to 1.2 Mbits/s and audio codec could scale from 5.3 kbits/s to 64 kbits/s. The programmable processor gives the designer a virtual carte blanche for selecting different functionality. For instance, by using a codec at 20 kbits/s, the design can include video telephony. At 386 kbits/s, a DSL line is designed in, and at 128 kbits/s, a 2-B ISDN interface can be used.
Scalability gives the designer not only the opportunity to design in multiple functions, but also multiple modes. This same design serves as a template or sample application that acts as a basis for adding different modes of operation similar to what standard telephony offers. For example, the system engineer and developer can include in a video phone design features such as address book, privacy mode and picture frame-rate control. If the videoconferencing system is being used as a video phone and not much movement is occurring, the consumer can set the frame-rate quantization value so that he or she achieves the best picture quality. Or vice versa, if motion is more important and picture quality isn't, the frame rate can be set higher and the trade-off is picture quality.
A hardware implementation of this consumer videoconferencing system design uses the programmable VLIW media processor, which can perform up to 27 operations concurrently. It performs a host of video and audio encoding and decoding algorithms, as well as front panel control, remote control processing, acoustic echo cancellation and video pre/postfiltering. The system comprises the VLIW media processor, video and audio analog-to-digital converters (ADCs), V.34bis modem, video and audio digital-to-analog converters (DACs), either flash or E2PROM devices and 8 megabytes SDRAM.
The SAA 7111A video decoder is used in this design to capture video input. It is programmed via the IIC bus, and its main function is to decode the analog video input and generate digitized data to the video input of the VLIW media processor in CCIR 601 format. The video clock is always generated by the SAA 7111A while the VLIW processor on-chip video input operates in slave mode. This video decoder supports National Television Systems Committee (NTSC), phase alternate line (PAL), sequential couleur avec memoire (SECAM) and substandards.
As for the video encoder, the SAA 7125 encoder is used for generating video output. It also is programmed via the IIC bus with its main function being to convert the video out from the processor to analog video signals. The processor generates the video-out clock. The SAA 7125 supports NTSC, PAL, SECAM and substandards.
The AD 1847 audio codec is controlled by the processor via the IIC bus. It has two functions. One is to capture audio from the input port; the other is to generate audio to the main output port. Capturing audio from the input port can be either a mono microphone input or stereo line input. The input mode can be selected by programming the I/O expander. The digitized data is then applied to the audio clock and data inputs of the processor. As far as playing audio to the main output port, the processor delivers audio data via the output audio clock and data lines.
Sample frequency is the same for both record and play and is determined by the audio codec. Audio data and control data can both be sent over the IIC bus. The designer can control such parameters as sample frequency (steps of 0.022 Hz), input gain (0.22.5 dB), and output attenuation (-95.0 dB). The UDA134x family of audio codecs is an alternative to the AD1847 codecs.
The SAA 7167 encoder is used for VGA output and converts CCIR 656 data in YUV format to analog RGB output. Like the other devices, it also is programmed via the IIC bus. The video-out clock and data lines are directed to the SAA 7167, with the VO-I01 and VO-I02 signals used to generate the horizontal and vertical synchronization signals. In combination with the VLIW media processor, the SAA 7167 generates various VGA standard video signals and other interlaced and noninterlaced video signals.
The processor's video-out module can generate video signals up to a pixel rate of 40 million pixels per second by using the flexible sample clock direct digital synthesizer and the programmable image parameters in the video-out module.
Other key functions in the consumer videoconferencing system design include a boot E2PROM, flash memory and SDRAM. The E2PROM contains the program code that is executed directly after power up or a master reset. It is in-circuit programmable using the system IIC port connected to the parallel port. Additionally, the E2PROM device contains the configuration settings for the VLIW media processor such as clock speed and memory size.
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