Different applications require different combinations of flexibility and performance, and the newest digital signal processor architectures meet that need by providing for varying degrees of application-specific architectural enhancements. These features make it possible for off-the-shelf DSPs to address the most demanding of real-time applications while relieving some of the pressures faced by time-squeezed applications developers.
Essentially, core modification is the adding or altering of functional units within the core. Typically these functional units perform basic building-block instructions, so functionality added on this level generally has a wide applicability.
Hardware extension is a similar concept to core modification because the extensions share many of the resources of the core, such as buses and registers. However, hardware extensions are adjunct units and typically perform more-focused, complex functions than those of the more general-purpose core units. Coprocessor addition involves the use of a separate hardware unit, which acts autonomously from the core and typically provides a complex, highly focused function.
Core modification can incorporate a wide range of options. These can include radical architectural changes such as the addition of the multiply-accumulate (MAC), which differentiates the DSP from a standard microprocessor, and more subtle changes such as the addition of a core instruction.
For instance, TI's C64x DSP improved imaging performance over the previous generation by providing single-instruction, multiple-data (SIMD) support on all functional units. This makes it possible to perform eight 8-bit MACs or four 16-bit MACs per cycle. Since this was done without adding significant functional-unit hardware, it has a very minor cost in terms of added resources, but provides much greater performance in imaging applications, which typically use 8-bit data.
A similar but more radical core modification is demonstrated by the Analog Devices Inc. Blackfin processor, which adds four 8-bit arithmetic logic units onto a standard DSP core. This is also done to improve imaging applications, as is evident from the added core instructions that utilize these ALUs. In both cases the added functionality is somewhat general, ssince as core functional units, the ALUs on both the C64x and the Blackfin have a wide range of 8-bit instructions.
The second type of architectural enhancement is hardware extensions. The TMS320C55x was the first DSP core on the market to use this concept. Hardware extension is enabled in this processor by the ISA Extension Interface, a methodology used in developing the C55x core that provides a bridge for the core buses, addressing units, registers and accumulators. By utilizing the ISA Extension Interface, hardware extensions build upon the C55x core, sharing the core resources and becoming a part of the core signal flow.
Because the hardware extensions share core resources, there is no need to duplicate hardware that already exists in the core, such as program sequencers and program address units. In this way, adding hardware extensions is similar to adding functional units to the core architecture; however, there are a few key differences.
Because the hardware extensions are modular, adjunct units, it is simple to remove or trade these units, allowing a single DSP core to be developed into many different devices targeted at different applications. Also, hardware extensions are not necessarily as general purpose as core functional units and often provide more-focused, higher-performance routines.
Since hardware extensions are not a part of the core unit, they may add revolutionary change to the overall DSP system, whereas core modifications are typically evolutionary modifications. In many ways, hardware extensions are a compromise between core modification and coprocessors, providing a unit that is separate from the core but still intimately connected to it.
The third enhancement, the coprocessor, basically is functional hardware that operates autonomously, not sharing any of the core's resources. Since coprocessors do not have their own programs and since they run independently of the core, there is a limit to the degree of programmability they can afford. Typically a coprocessor will have a number of registers for specification of parameters, but can run only one fixed function.
Since they are separate from the core, coprocessors, like hardware extensions, usually bring revolutionary change to the DSP system. Probably the most common example of a coprocessor seen in today's DSPs is the direct memory access (DMA) controller. This coprocessor provides the fixed functionality of moving blocks of data from one location to another. A DMA usually can be used for just this one function (and possibly simple sorting), and this functionality can be modified only to the level of the DMA's parameters. These parameters vary but almost always include source address, destination address, data size and number of data elements to be transferred.