CONTENTS - Part 2
Inter Symbol Interference (ISI)Eye Pattern Diagram
Dealing with Line Losses
Signal Losses Compensation Methodology
Line Equalization Methods
Summary and Conclusions
Inter Symbol Interference (ISI)
So far we have discussed the nature of losses on a PCB interface line. As a result of the losses the signal reaches the receiver distorted and attenuated. Working with TTL and CMOS drivers in relatively low-speed applications we have learned already about such signal integrity issues as reflections, crosstalk, ground bounce and so on. The high-speed interfaces that became so popular just a few years ago bring all these known issues to a new level. But that is not the end of our troubles. The higher data rates introduced a new problem that we have not been accustomed to before, the problem is called Inter Symbol Interference, or ISI. The conclusion that we made considering the frequency effect on attenuation constant will help us explaining this problem that plagues the high-speed applications. With increase of the signals' data rates this problem becomes quite significant and may render the transmission media non-functional.
Consider the frequency effect of attenuation constant. The higher harmonics are attenuated the most. In the digital signals the effect of higher harmonics is visible mostly at the signal transitions. If the amplitude of the higher harmonics is reduced then the lower frequencies become more dominant in shaping the transition edges and, therefore, the transitions become slower.
Now let us look at the effect of the phase dependency on frequency. As we have seen earlier the phase constant formula is the same for lossless and low loss lines. For low loss applications, of course, this formula is an approximation. For majority of PCB applications the low loss model is quite adequate. The relationship of the phase velocity along the line and phase constant is:
Therefore, in case of lossless or low loss signals all harmonics propagate with the same speed and a digital signal does not suffer distortion. For the cases when relationships R < theta*l="" and="" g="">< theta*c="" are="" not="" true="" the="" lines="" exhibit="" non="" linear="" dependency="" of="" phase="" constant="" on="" frequency="" and,="" therefore,="" variation="" in="" phase="" constant="" for="" different="" harmonics="" or="" variation="" in="" propagation="" speed.="" this="" effect="" is="" called="" dispersion="" and="" it="" causes="" spread="" of="" phases="" for="" different="" harmonics="" in="" the="" signal.="" that="" causes="" amplitude="" attenuation="" and="" slowing="" down="" of="" the="" signal's="" edge.="">
We have discussed the increase of amplitude attenuation and slow down of the signal transition as effect of signal's data rate increase. When data rates are so high that duration of transitions are comparable with the signal's cycle the edge of one signal does not have time to complete before the next cycle starts. That changes the initial conditions for the following cycle. That phenomenon is called Inter Symbol Interference or ISI. One obvious thing that follows as a result of ISI and change in initial conditions for various bit cycles is that resultant amplitude will also change. Different bits will have different amplitudes due to their position in the stream. Of course the variation in amplitude is limited to a certain range. Another aspect of the signal that is quite critical and affected by variations of the initial conditions is the time when signal crosses the receiver's threshold. Due to the different starting point this time will also vary with variation in data content. This effect is called jitter. The ISI is not the only source of jitter but it is quite a significant contributor.
To summarize the ISI discussion I may state that variations of the data pattern produces variations in signal edge and amplitude. The reason for that we have discussed above. But I still would like to present another view at the ISI aspect. Considering that data signal pattern will vary due to variation in data content it is obvious that frequency content in the stream of data will vary as well. The frequency content in a stream of alternating ones and zeros is much higher than in a row of multiple ones or zeros. Therefore, the effect of ISI differs for different data bits in the stream of data.
Eye Diagram Pattern
In order to measure the ISI effect and overall performance of an interface the digital design engineers started using methodology used by communications engineers on long haul interfaces. The method is called Eye Pattern Diagram, sometimes abbreviated as EPD.
Figure 3. Illustration of Eye Diagram Pattern
a) measurement equipment normalization, PRBS signal generator and Agilent 86100 scope with cables, no interface line included in the path,
b) Eye Diagram Pattern of 622 Mbps interface line, about 2" on the circuit modules and 16" on backplane, all FR4 material with two Z-pack HM connectors
The Eye Pattern Diagram is a signal observed on the screen of oscilloscope. It contains multiple signal cycles that are overlaid using infinite persistence property of a storage scope. The multiple cycles are randomly selected from the same data stream. In order to achieve random selection a stream of random data is required. It may be obtained using signal generators with PRBS (pseudo random bit stream) capability or using PRBS capabilities of some SERDES devices. By random selection I mean random data stream position. The cycle starts at the same trigger level. The idea is to display a significant number of data cycles with various initial conditions and verify the range of amplitude and jitter variations. The volume of samples and randomness of their occurrences should guarantee the completeness of the test and ensure that samples seen on the scope screen represent all possible variations in the signal's amplitude and phase jitter.
It is important to note that Eye Pattern Diagram test represents total performance of the interface. It includes other aspects that may affect the signal variations, such as reflections, crosstalk, ground bounce, signal jitter due to thermal effects in semiconductor and so on. In fact, it is beneficial to perform the Eye Diagram test in the environment with multiple data lines carrying the random data streams. That will produce more realistic crosstalk and ground bounce results.
Dealing with Line Losses
So far we have considered such problems as dielectric and conductor losses and their effects on the signal. The natural question would be what are the frequencies when we should really consider these issues and what should we do to still be able to receive data. If you read signal integrity articles in the media you have probably encountered such facts as conductor losses become noticeable at about 50 Mbps data rates, the dielectric losses, however, are really become noticeable only after 1 Gbps. From the Eye Pattern Diagram in Figure 3 you may conclude that for 622 Mbps application the backplane interface has a good margin. I should also provide some more information about this interface. It is implemented using FR4 material on backplane and circuit modules. On both modules the distance to backplane connectors is about 2", the distance over the backplane is about 16". It is not the longest line that may be encountered in backplane interfaces, however, the way the signal generator and scope probes were connected is not the most ideal. I had to use SMA connectors on pig-tails to attach to modules not intended for this connection. Connectors used for both circuit modules connection to the backplane were not designed for differential impedance controlled applications like HM-Zd or Teradyne's VHDM-HSM. The connectors were Z-pack HM, or Compact-PCI type with 2-to-1 signal to Ground ratio. Thus, considering the explanation above one may conclude that an average backplane interface, and, therefore, majority of PCB applications, may not require any special design in order to alleviate the losses in the commonly used FR4 PCB modules for about up to 1 GHz applications. There is no question that decision like that should be accomplished by a careful analysis in each particular case.
Once we crossed into the data rates above 1Mbps the issues of losses should be addressed. There are two aspects of the losses and we should consider both of them. For conductor losses, for example, we know that the skin depth is responsible for the resistance increase. Therefore, using wider traces will be beneficial. Teradyne signal integrity engineers have investigated this suggestion in reference 5; they suggest that noticeable improvement is present until line width has not reached 0.008" -- 0.010". The further increase in line width produces diminishing returns. The same conclusion may be found in works of other authors. Quite often before one commits to a certain line width she or he should consider other design parameters, such as line impedance, feasibility to route a differential pair with lines of this width and so on. It is interesting that in practical applications this value of 0.008" is not easy to maintain.
Let us consider another aspect of lossy lines, the dielectric losses. The parameter loss tangent is a function of the dielectric material and it is a known fact that FR4 is not the best of the available materials in that respect. However, it is the least expensive. Let us look at the parameters of the FR4 material: er = 4.3,
Tan-phi = 0.021 at f = 1 GHz.
The examples of other materials could be:
RO4003C, from Rogers Corp., with parameters: er = 3.38, tan-phi = 0.0021 at f = 2.5 GHz,
RO4350B, from Rogers Corp., with parameters: er = 3.48, tan-phi = 0.0031 at f = 2.5 GHz, or
N6000, from Park Electrochemical/Nelco, with parameters: er = 3.4, tan-phi = 0.009 at f = 2.5 GHz,
N6000 SI, from Park Electrochemical/Nelco, with parameters: er = 3.2, tan-phi = 0.009 at f = 2.5 GHz
One may immediately see the difference in dissipation factor. That was just a small selection of available materials. There are quite a few materials that are offered by various vendors for high-speed applications. These materials have lower dielectric constant, therefore, faster signal propagation, and lower than FR4's loss tangent. However, the loss tangent is not the only parameter that is critical for selection of appropriate material for high-speed application. Other technical parameters that are important for mechanical and thermal integrity of the product, as well as quality and reliability should be carefully analyzed. And of course the issues of manufacturability and cost are extremely critical as well. In addition, an engineer should consider also the familiarity of the PCB vendor with a particular material that he or she wants to use. Given all these considerations and the most important one -- cost consideration, the interface technology manufacturers were trying to extend the life of the FR4 material. Let us look into the details of how it was done in the following section.
Signal Losses Compensation Methodology
The task was to improve the Eye Pattern Diagram since it is a measure of the interface performance. It is obvious that if Eye Diagram is taken at the driver's output the result would be quite good, since signal has not traversed the interface medium yet and has not suffered the distortions due to losses. However, at the end of the line the Eye Diagram reflects the distortions that we have discussed above, see Figure 3. Therefore, the natural question is how to improve the line performance and open the eye of the signal pattern on the scope screen.
Figure 4. General Interface Line Model
The line model in Figure 1 contains the generic line Transfer function. This is a simplified representation of the line without consideration of any reflections, crosstalk and so on. If the goal is delivering signal to the receiver with minimum changes then there are two options that one may consider. These methods may encompass a variety of implementation options and have been developed and used for just such kind of problems in communications industry. One approach would be to correct the line by adding a filter with a transfer function that is an inverse of the line function.
Figure 5. Line Equalization Model
The line with its losses, reflections, crosstalk and so on is the source of signal distortions. If these distortions are equalized by passive or active filtering, as shown in Figure 2 the result will improve. The second method addresses the problem from another angle. If signal was modified by a function inverse to the transfer function, see Figure 3, of the interface line the resultant waveform at the end of the line would be as if normal signal sent down the distortionless line.
Figure 6. Signal Compensation Model
Let us now look into the details of line equalization and signal compensation methods.
Line Equalization Methods
We have outlined the line equalization concept above. In practice, the equalization is performed by a filtering device. Considering that a transmission line with losses behaves like a low pass filter, see Figure 1, the equalizing device should behave as an inverse function -- high pass filter. There are two approaches that have been used, the passive and active. In case of the passive devices the high pass function may be achieved using CR, CRC or LRC configurations of the filters. The active approach is based on application of DSP components and has the benefit of gain that passive filters do not provide.
The active filtering devices for high-speed applications are available from some IC manufacturers. However, the common passive components do not usually come with application manual and it would be beneficial to consider in more details the passive approach, which may be quite adequate for the applications below 5 GHz. Of course the values of the components should be based upon the line performance. The attenuation of the line is a function of multiple parameters: the line length, width, dielectric material, dielectric thickness and so on. As a general example the FR4 boards exhibit signal attenuation in the range of 0.5db to 1.0 db per inch, per decade of frequency. Let us consider an application of a simple CR filter, see Figure 4.
Figure 7. Line Equalization Method
The RC circuit, together with termination resistor Rt or line impedance behind the circuit, forms a filter. Its Transfer function may be expressed as follows:
Rt Rt sCR + 1
H(s) = ------------------------- = ----------- ----------------------------
R/sC Rt + R sCRtR/(Rt+R) + 1
---------------- + Rt
R + 1/sC
Considering that this transfer function has one zero (-1/CR) and one pole (-(Rt+R)/CRtR) the Bode plot of this filter will look as in Figure 8:
Figure 8. Attenuation vs. Frequency Plot
The values of the R and C are determined by a number of factors:
Lower frequency attenuation: Considering that frequency in the data stream may be lower than the upper signal's frequency at least 10 times, the maximum attenuation should be limited to a reasonable value. This value is a function of a signal's amplitude and receiver's requirements, but for the ballpark number I would select --6 db. This value is controlled by Rt/(Rt+R) coefficient.
Total attenuation: Total attenuation will be a function of the distance between the zero and the pole of the transfer function since the slope of asymptotic attenuation change is 20db/decade. Of course, in this particular case the filter has no gain capabilities and the upper limit of the plot is at 0 db.
Upper break frequency: The upper signal frequency should be beyond the upper break frequency of the filter so it would not be attenuated. This value is defined by magnitude value of the pole (Rt+R)/CRtR.
Figure 9. Equalization Result
At the plot in Figure 6 the red trace asymptotically represents the equalized attenuation curve at the input of the receiver. This is an example of application of the simplest filter, but it gives you an idea of what to look for in the line equalization approach using passive elements. With more complex structure one may achieve a better fit especially for higher Gigaherz applications.
Using the iterative simulation process one may verify the best equalization fit faster and more accurately. The simulation tool, which is used for that, should be able to generate Eye Diagram Patterns quickly and accurately, since a large number of tests are required. In case of the manual approach one would require accurate line parameters information. The required parameters, such as line attenuation and phase characteristic, may be measured on a prototype or specially manufactured board mock up using Network Analyzer or TDR/TDT.
All the troubles we have gone through above could be avoided if we use an active device. Such devices, for example, as Gennum Corp. GN2001 and GN1002 claim adjustment free operation. That means that they are using the values of attenuation from the known signal in order to generate an equalized frequency response. These devices have the capability to adjust to line conditions. From the incident signal information and measurements at specific frequencies they are capable to determine the attenuation of the channel. The active device is also capable to provide signal gain in order to improve the signal at the receiver. The passive equalizer circuits do not have this capability. Of course the disadvantage of active devices is the real estate on the board and additional power consumption.
As we have seen in case of passive or active equalizers we used external devices to perform the equalization function. We have to introduce a series component into the line that has a transfer function that is as close as possible to the inverse of interface line transfer function. The equalizer is usually located at the end of the interface line. However, there is no reason not to introduce a similar function at the driver's end. If this function is introduced into the driver it is called pre-emphasis or pre-amplification.
There are few basic techniques that are used by various manufacturers in order to modify the output signal so the receiver would be able to read the signal without errors.
The spectral compensation approach addresses the fact that during the signal transitions the highest frequencies are dominant. Since higher frequencies are attenuated more than lower the resultant signal is distorted, see Figure 10.
Figure 10. Typical Signal Distortion
In order to reduce the distortions the signal is pre-distorted in the driver and placed on the line. The pre-distortion is called pre-emphasis and may be controlled in order to accommodate various interface conditions. The spectral compensation pre-emphasis is shown in the Figure 11.
Figure 11. Spectral Compensation
A slightly different approach uses the fact that amplitude is most affected in single bit alternations. The data stream is examined and logical operation is performed allowing a preset higher output amplitude every time an alternating single bits or in some applications double bits are detected. That produces waveforms with amplitudes of the first bit in a row higher than the following bits, see Figure 12.
Figure 12. Single Bit Pre-Amplification
Both approaches, the spectral compensation and single bit pre-emphasis, have various levels of amplification and may be pre-set by designer to an appropriate level depending on the line length an other line parameters. However, some of the manufacturers of high-speed line drivers adopted techniques used in long-haul data communications, where signal's harmonic content is manipulated to accommodate the interface distortion according to feedback the driver receives from the receiver. Thus, the driver-receiver pair adopts the level of pre-emphasis according to the quality of the line. In this case the control of the driver's output is self-adaptive and automatic. Of course, in order to be able to provide the feedback the driver/receiver should have a full-duplex connection.
The two methods -- line equalization and signal compensation, are complimented by another powerful tool: multilevel signaling. The multilevel signaling allocates multiple voltage levels, more than conventional two in binary application, to represent a value of a single digital position. This way a single bit position may accommodate multiple steady state voltage levels and represents larger amount of information. Therefore, lower number of positions is required than in binary transmission and lower data rates may be used to transmit the same amount of information. That is the major benefit of multilevel signaling, it reduces the data rates and, therefore, the frequency content of the data so the level of signal distortions is also reduced. This method may be used with either of the signal compensation methods described above, including adoptive methods.
Summary and Conclusions
The system and circuit module interface design requirements have been getting more stringent and more complex all the time. However, for a number of years engineers were able to utilize past experience and apply it with greater diligence. In a few past years the development of high-speed interface has literally taken a qualitative leap. This change has added additional issues to area of signal integrity and additional demands on digital designers and system engineers. In order to approach the design of high data rate systems an engineer is required to have a deep understanding of issues raised by presence of high frequencies in signals. The issues like dielectric loss, skin effect or ISI have to be dealt with in every design, which is using today's technology. An engineer should know the tools and measurement methodology in order to be able to control the quality of the interface design.
The new interface technology has been introduced and is being developed by IC manufacturers every day in order to address technical issues and overcome problems posed by high data rates. It is imperative to be aware of these developments since they provide technical solutions and simplify the application of interface components. One should also be aware that sophisticated interface components use DSP technology and heavy signal processing. This technology requires a significant amount of power and has cost implications. In order to produce a cost effective and reliable design an engineer should understand interface limitations and be able to justify the design requirements.
1 "Lossy Transmission Lines: Plain and Simple" - presentation by Dr. Eric Bogatin at PCB West, March, 2002
2 "Field and Wave Electromagnetics" by David K. Chang, Addison-Wesley Publishing Company, 1983
3 "Advances in High-Speed Design in Dispersively Attenuating Environments such as Cables & Backplanes -- presentation by Timothy Hochberg and Henri Merkelo from AtSpeed Technologies, and Mike Resso from Agilent Technologies at DesignCon 2001 High-Performance System Design Conference
4 "Practical Considerations in Implementing Multi-Gigabit Backplane Interconnection Systems" -- presentation by Ulrich Wallenhorst and Markus Witte from Harting Electronics GmbH & Co. KG/Germany, Alexander Barr from 3M, Inc., Dr. Edward P. Sayre and Dr. Edward P. Sayre, III from North East System Associates, Inc. at DesignCon 2002 High-Performance System Design Conference
5 "Design Considerations for Gigabit Backplane System", IEC Web ProForum Tutorials website, http://www.designcon.com/onlineeducation/tutorials.html
6 "High-Speed Interface -- Analysis and Design, Practical Approach" - presentation by M. Grabois at DesignCon 2000
7 "Signal Integrity Testing And Requirements Imposed By High-Speed Design" - presentation by M. Grabois at DesignCon 2001