Body:The IEEE 1394 serial bus standard provides a networked digital interface solution for consumer electronics (CE) devices and personal computers, though both types of devices are not required in order for the system to work. The bus can be used to send real time streaming audio and video, data transfers, or command and control information to any other device on the bus.
When adding IEEE 1394 to CE devices, system design engineers need to be aware that the bus bandwidth is shared among all devices on the bus. With isochronous traffic, there are few bandwidth issues since the bandwidth is guaranteed. However, asynchronous bandwidth is not guaranteed. System designers must pay close attention to factors that affect asynchronous bandwidth when designing their systems.
Two typical bottlenecks to achieving the necessary asynchronous bandwidth requirements are throughput on the interface between the 1394 chip set and system memory and optimized 1394 bus performance
Interface Throughput Between the 1394 Chip Set and System Memory
Asynchronous performance is affected by how well the system can handle the bandwidth of the incoming and outgoing 1394 data.
For example, what is the access time to and from the 1394 chip set buffers? The data on the 1394 bus could theoretically be transported as fast as 2048 bytes approximately every 46uSec. The system processor or DMA must handle this data throughput without underflowing or overflowing buffers.
Sending data over the 1394 interface requires the system processor to handle several other functions in addition to the other functions it controls in the system. The 1394 protocol layer software may require interrupts and service from the system processor. The system processor must service these interrupts and perform protocol functions in a timely manner.
Since many asynchronous transactions require responses, the performance also depends on the receiving device. For example, the data transaction rate of an SBP2 (Serial Bus Protocol 2) system depends on the speed of the hard disk drive.
Many other factors that are specific for each individual system will affect asynchronous performance. The system designer needs to account for them in the system design.
Optimized 1394 Bus Performance
The 1394 serial bus performs two types of transactions: asynchronous and isochronous. For isochronous transactions, the sending device will allocate bandwidth for the isochronous data before it begins transmitting. Since the bandwidth is allocated already, the bandwidth for isochronous data is guaranteed. Data whose arrival time is more important than guaranteed delivery, such as real-time audio and video, use isochronous transactions.
Asynchronous transactions have guaranteed delivery. The receiving node hardware will send an acknowledgement that the packet was received correctly. However, their bandwidth is not guaranteed. After completing all allocated isochronous traffic, the 1394 bus will allow asynchronous transactions based on arbitration until the end of the 125 uSec cycle. There is no guarantee that every node can transmit an asynchronous packet every cycle.
Command and control transactions are random, require little bandwidth and need acknowledgement that they were received. These requirements make asynchronous transactions ideal. File transfers, in which the data must be delivered correctly but the latency involved in the delivery is not important, are also well suited to asynchronous transfers. The common Serial Bus Protocol 2 (SBP2) uses asynchronous transactions and is the standard means that 1394 disk drives use for file transfer. Recently, some within the industry have pushed to use asynchronous transactions for more types of data transfer. For example, both the EIA775 (Electronic Industries Association) and HAVi (Home Audio Video Interoperability) standards require moving blocks of time-sensitive data using asynchronous transactions. An SBP2 PVR (Personnel Video Recorder) implementation requires moving blocks of data to and from a hard disk drive using asynchronous transactions. The IP over 1394 implementation uses both asynchronous and asynchronous stream transactions, which use asynchronous bandwidth. Using asynchronous transactions to move time-sensitive data makes it very important to optimize the use of the available bandwidth on the bus in order to ensure that data gets where it is needed when it is needed.
One way to help reach the asynchronous bandwidth needed for all these applications is to optimize the 1394 bus performance. Several factors affect 1394 bus performance, including:
Number of hops in the topology
Use of 1394a asynchronous accelerations
Asynchronous packet size and speed
Other isochronous operations on the bus
1394b bus performance enhancements
The slowest node on the bus can limit the speed of the entire bus and the maximum packet size. For example, in Figure 1, the set top box can only send a maximum asynchronous packet size of 1024 bytes to the DVHS because they are connected through a slower node, the 200 MBits/s digital TV. If the digital TV was 400MBits/s capable, the set top box could send a maximum packet size of 2048 bytes. See Table 1 for the correlation between maximum packet size and bus speed. Figure 1 shows a poorly optimized topology, a better topology would be to place the STB where the DTV is, allowing the two S400 nodes to be connected directly and not through a lower-speed "speed trap" like the S200 DTV. As a general rule it is better to cluster like speed nodes together to avoid speed traps.
Figure 1: Bus Speed
Table 1: Bus Speed and Maximum Asynchronous Packet Size
Note that all the packet sizes listed in Table 1 will take the same amount of time on the bus if sent at the speed associated with each. For example, 1024 bytes sent at 200 MBits/s takes the same time as 4096 bytes sent at 800 MBits/s. To be a "good neighbor" on the 1394 bus, all packets should be sent at the maximum speed possible to use the minimum amount of bandwidth.
Gap count will also affect 1394 bus performance. Asynchronous bus arbitration depends on the idle times between packets, specifically the subaction gap and arbitration reset gap. See Figure 2 for a 1394 bus cycle description. The length of the idle times depends on the gap count. If the design does not optimize the gap count, the bus can have unnecessary delays that reduce the overall bandwidth. The gap count can be optimized either by using "ping packets" (refer to section 188.8.131.52 of the IEEE 1394a-2000 standard) or by using Table E-1 in the IEEE 1394a-2000 standard.
Figure 2: 1394 Bus Cycle with Arbitration Gaps
The number of hops in the topology also affects asynchronous performance. "Daisy chaining," or linking the 1394 devices end to end, is an inefficient bus configuration. In Figure 3, the minimum latency between each asynchronous packet is ~2.82uSec. (See Reference Table 4-33 and 4-34 of the IEEE 1394-1995 standard for equations.)
Figure 3: Daisy Chain Bus Topology
Figure 4 shows a much more efficient "branching" bus topology. The minimum time between asynchronous packets is ~1.84uSec. In this example, using a more efficient topology saved one microsecond of bandwidth between each asynchronous transaction. In general, the amount of bandwidth wasted per asynchronous packet by inefficient topologies increases by about 1uSec per each additional unnecessary hop in the network.
Figure 4: Branching Topology
Another factor to consider is asynchronous acceleration. IEEE 1394a-2000 added the option for software to enable asynchronous packet acceleration by allowing nodes to send asynchronous packets without waiting for gaps or even arbitration in certain circumstances. Asynchronous acceleration works with any combination of other nodes (1394-1995, 1394a-2000, or 1394b-2002).
Another form of acceleration added in 1394a was the use of a priority budget for asynchronous transactions (IEEE 1394a-2000 paragraphs 3.9.4 & 184.108.40.206.5A). Normally an individual node must wait for an arbitration reset gap before sending another packet. Arbitration reset gaps are almost twice as long as subaction gaps and are a significant part of the asynchronous overhead. The priority budget allows a node to send a set number of asynchronous packets before waiting for an arbitration reset gap. This feature improves the throughput on the bus by allowing a node to send more than its "fair share" during each 1394 fairness interval. It especially improves the performance in a system that has multiple devices trying to send asynchronous data on the bus at the same time.
Asynchronous Packet Size and Speed
The size of each asynchronous packet affects the amount of bandwidth available for asynchronous data. Each asynchronous packet requires up to 24 bytes of overhead as described by the 1394 standard. Sending one large packet will save the extra overhead of several small packets. Figure 5 shows that sending one 2048-byte packet requires 72 bytes less overhead and three arbitration reset gaps less than sending four 512-byte packets.
Figure 5: Asynchronous Packet Size Optimization
Other Isochronous Operations
1394 isochronous transactions have guaranteed bandwidth. Once all allocated isochronous channels are given the opportunity to transmit, the asynchronous transactions are allowed to arbitrate. As shown in Figure 6, less isochronous traffic means more bandwidth available for asynchronous transactions. System designers must take the amount of isochronous bandwidth needed into account when making assumptions about available asynchronous bandwidth. To increase asynchronous performance, the system designer should not transmit more isochronous packets than required.
Figure 6: Isochronous Bandwidth
1394b as a Bus Performance Enhancement
In the future, the designer can use 1394b to speed data transmission. The 1394b-2002 Bus Owner Supervisor & Selector (BOSS) arbitration provides the ultimate in optimization for asynchronous transactions. 1394b utilizes a dual simplex communication, which allows for arbitration in parallel with data transmission. One set of twisted pair connections transmits data while the other pair transmits requests for the bus. The transmitting node owns the bus and grants the bus to the highest priority requester as a special code attached to the end of the packet it was transmitting. This eliminates idle periods on the bus, maximizing the efficiency and bandwidth utilization of the bus. However, this only works at peak effectiveness with a network that is only 1394b. Whenever a 1394a node is on the bus, the bus reverts to arbitration with the gaps the 1394a nodes requires in order to arbitrate for the bus.
Factors Combine to Optimize Bus Performance
The 1394 isochronous service provides the ideal mechanism for transporting guaranteed-bandwidth, deterministic-latency streams like audio and video. If implementing a latency-sensitive transport using the guaranteed-delivery asynchronous mechanism on 1394, designers must try to optimize the factors under their control and plan for factors outside their control.
About the authors
Burke Henehan's tasks have included specifying requirements, creation of training seminars, datasheets, application notes, testing devices, answering customer questions, debugging customer problems, representative to standards bodies, and demos. He can be reached at BHenehan@ti.com
Allison Hicks is responsible for determining functional requirements for digital interface silicon solutions for the consumer electronics market, including 1394, USB, and DVI/HDMI. She can be reached at email@example.com