MANHASSET, N.Y. Using a tightly coupled, highly integrated RF and baseband design, Intersil Corp. has realized a working direct-conversion radio that promises to drastically reduce the cost and size of 802.11b (Wi-Fi) radios. Intersil's announcement last week comes at a time when pricing structures for 802.11b radios are facing extreme downward pressure, as traditional suppliers such as Intel and Agere face competition from low-cost, high-volume vendors like D-Link and Linksys.
According to a report by Cahners In-Stat Group, the competition has forced severe price cuts already and will continue to do so throughout 2001. But the report predicts end-use revenue growth by early 2002 as 5-GHz technologies are deployed. The report also predicts that wireless LAN (WLAN) technology will be immune to the current economic conditions and will increase its total enterprise WLAN end-use revenues to almost $4.6 billion by 2005.
All this is good news for Intersil, which has spent the past year developing its direct-conversion Prism 3 chip set to cement its standing as a leading provider of WLAN chip sets, a position it shares with Agere. While Agere develops its own baseband and media-access controller and relies on Philips for the RF front end, Intersil, on the other hand, has been doing both. That is what separates the two companies and gives Intersil the edge in direct conversion for 802.11b radios, said Larry Ciaccia, marketing manager at Intersil.
"We took a system-level approach that tightly couples the baseband to the RF front end," said Ciaccia. "This is essential if a fully optimized zero-IF (ZIF) radio is to be achieved." The tight coupling allows Intersil to apply complex, nonlinear signal acquisition algorithms to control the automatic gain control (AGC) and dc-offset loop closures, which is a particularly difficult task in a WLAN environment.
"Because of the short packet preamble you only have about 10 microseconds to close," said Doug Schultz, a designer on the Prism 3 team. "Otherwise, you don't get the data." While targeting the short-preamble IEEE specification is aggressive, it allows the radio to achieve maximum throughput of 11 Mbits/s.
Cellular applications have been inundated lately with direct-conversion solutions from the likes of Analog Devices, Conexant, Parkervision and Texas Instruments. "While it's been done before, it's not been done for this application," said Schultz. "Cellular applications are full duplex and don't face the same time limitations when it comes to converging."
Schultz said that while Philips has already released a direct-conversion radio for .11b, it suffers from the fact that the AGC and dc-offset loops are completely self-contained. "You can't fully optimize for cost and performance with that type of design," he said.
Much of the cost reduction in direct-conversion radios comes from the elimination of the intermediate-frequency stage between the RF front end and the baseband. That eliminates many components, most notably the expensive SAW filter. Along with lowering cost and saving space, the smaller component count also reduces inventory requirements, saves on assembly and test costs and improves overall reliability.
In Prism 3, the approach has allowed the complete radio to be reduced to four main components the ISL3871 baseband processor and media-access controller (BBP/MAC), the ISL3684 RF front end, the ISL3984 power amplifier and the ISL3084 5-GHz voltage-controlled oscillator (VCO).
"Keeping these stages separate allowed us to use the best technology and process for each," said Ciaccia. The BBP/MAC is done in a 0.25-micron TSMC CMOS process, while the RF stage and VCO are in Intersil's own UHF-2 BiCMOS process and the power amp uses IBM's silicon-germanium process.
Due to the 15 patents pending for the Prism 3 design, implementation details are sketchy, limited to "proprietary algorithms" for the acquisition processing and "proprietary layout techniques" to minimize local-oscillator coupling (to reduce the dc offset). "We also minimize coupling through the use of the UHF-2 process, which features extra layers for junction isolation," said Ciaccia. "And the inputs are fully differential." For the transmit side, the design uses "highly linear circuit design" with patented techniques to maintain phase and amplitude balance and control of dc offset.
However, performance details at the receiver include adjacent-channel rejection of about 40 decibels (the IEEE spec is 35 dB) and an input IP2 range of between 14 dBm and 51 dBm, depending on the front-end gain state. The spectral regrowth on the transmit side is greater than 40 dB down at the first side lobe, at 30 dBc.
The device operates from 3.3 V and consumes 0.9 W in receive mode or 1 W in transmit. Standby consumption is 0.01 W.
Available later this year, the Prism 3 will enable a bill of materials of $35, compared with $52 for the Prism 2.5.