Like other segments of the semiconductor industry, digital signal processor (DSP) chips reap the rewards of ever-advancing integration. As chip geometries scale downward, designers are now routinely packing millions of transistors on a single die, forming complete subsystems ICs. With that trend comes a natural shift toward more application-specific DSPs. As chips integrate more, the more they can vary in their combination of options, compute modules and memory configuration.
Unlike the general-purpose microprocessor realm, DSPs are used in a vast array of very different applications. Occasionally such applications can employ generic off-the-shelf components. But, increasingly, the needs of communications and consumer DSP applications demand application-specific capabilities. While it might be possible to implement a DSP that can execute all algorithms with equal capability, that's becoming less practical because of component cost or performance.
"There's so many applications out there that it's hard to narrow in on any single one with the generic catalog DSP products," said Chris Schairbaum, worldwide marketing manager for Texas Instruments Internet Audio Group. "You're starting to see more peripheral sets that are much more geared to the end application. And it's not just peripheral sets, it's also specific types of coprocessor engines with targeted performance levels, wrapped around particular core processing engines. That said, there will always remain a demand for the generic catalog parts."
The major DSP chip vendors and users are now facing an important crossroads. At the current state of architecture design and technology, it's now practical to integrate control functions and traditional DSP into the same processing engine. The cost benefits are attractive, enabling designers of small systems to eliminate the need for a separate microcontroller. Large systems, meanwhile, are able to eliminate the need for a separate general-purpose microprocessor, or a network processor for communications systems.
To keep memory hierarchies simple, Kumar Ganapathy, CTO of Intel's VxTel subsidiary, suggests handling DSP and packet-processing tasks on separate devices.|
The question of whether it makes sense to keep DSP functionality separate is far from black and white. A place where the choice gets complex is in the voice gateway realm. In a voice gateway, voice-processing cards perform the TDM (time-division multiplexed)-to-packet internetworking functions that involve DSP functions on the payload data, followed by packetization, header processing and aggregation to create a high-speed packet stream.
In his article, Kumar Ganapathy, chief technical officer at Intel's VxTel subsidiary, points out that there are two ways to go when designing the data plane functions of a voice gateway. You can either integrate the DSP and packet processor on the same device or optimize the DSP and packet-processing functions on separate devices.
The first design approach combines on the same die both the math-intensive DSP functions and the memory-intensive packet processor functions. Because those two functions require different processing structures, combining them leads either to including excessive memory on the device or to providing an external memory device with each DSP. Integration of the two functions therefore significantly increases both the card area and power requirements. The second design approach-using separate devices-builds optimized devices for both the DSP and packet-processing functions with processing engines and memory hierarchies that match an application's requirements.
Residential broadband is another area where the question of system partitioning creeps in. That market requires equipment that processes a diverse range of media algorithms. In his article, Cary Ussery, president and CEO of Improv Systems, describes why this application demands the broad use of programmable, configurable and scalable DSP processors coupled with stable embedded microprocessors.
Not all aspects of residential broadband separate neatly into the control and DSP sides of the question. Security functions, for example, can be separated into controlled access-firewalls and virtual private networks-and data encryption. The former is implemented in software on the control processor while the latter is implemented using custom DSP blocks. Data encryption requires real-time algorithms being applied to data moving through the gateway. The DSP requirements for those algorithms are unique compared with other DSP applications.
For small system applications, in particular wireless handheld devices, the notion of letting the DSP take over control functions is more straightforward. Such major DSP vendors as Texas Instruments, Analog Devices and Motorola have made recent architecture and product announcements along those lines.
In their article, co-authors Ravi K. Kolagotla, DSP architect, and Jose Fridman, DSP software engineer, at the Analog Devices/Intel Joint DSP Development Center, describe the center's Micro Signal Architecture. The MSA blends features of microcontrollers that allow it to replace both a DSP and a microcontroller in low-cost, wireless handheld applications.
The MSA core combines the processing power of a dual-MAC DSP with the control capabilities of a RISC microcontroller. The MSA core uses two basic types of instructions: those used for DSP-type number-crunching operations, and those used for microcontroller-type control functions and general tasks. Instructions are tuned for their specific tasks, but can be intermixed with no restrictions.
In the MSA core, microcontroller instructions perform basic control and arithmetic operations. This includes load/store, arithmetic, logical, bit manipulation, branching and decision-making operations. The DSP instructions may be executed alone or simultaneously with two load instructions or one load and one store instruction. Special multimedia instructions enable the acceleration of fundamental operations associated with video- and imaging-based applications such as are found in third-generation wireless algorithms.
Along similar lines to the MSA DSP, Motorola recently introduced a DSP that takes microcontroller functions onto the DSP. The new DSP56F80x family of devices targets motor control and other system control applications. Motorola argues that both pure DSP and MCU devices fail to fully meet such needs.
The DSP56F80x series of devices meets the computational requirements associated with complex control algorithms with a high-speed DSP core, capable of executing up to 40 million multiply-accumulate operations per second. The device offers a rich on-chip peripheral set, including pulse-width modulation capability, analog-to-digital conversion, bit I/O and multiple serial interfaces.