Backplanes get reference designs
As the speed of backplane interconnection systems increases, whether for networking, server or storage applications, connector manufacturers are finding it necessary to collaborate with silicon vendors on backplane reference platforms to validate their high-speed solutions. It's getting common today to find reference platforms that demonstrate the performance of a high-speed interconnect, backplane and transceiver products in real-life environments that show the entire system-level performance.
In many cases, designers can use reference designs as a starting point for the development of their backplane systems, speeding up the design cycle and, possibly, eliminating a number of design iterations down the road. Reference platforms also help designers when upgrading their existing infrastructure.
"For implementation of high-speed systems you need to create a performance/value trade-off," said Bob Thornton, director of marketing for Fujitsu Components America Inc. (Sunnyvale, Calif.). "And to achieve this, connector companies almost have to partner with some of the new transceiver or serdes chip manufacturers to show OEMs that they can implement a high-speed system at a reasonable price."
According to Thornton, this also includes showing them the design rules on how these high speeds were achieved. Fujitsu works with several chip companies to offer reference designs on its mezzanine connector, a board-to-board system based on the company's microGiGaCN high-speed, differential connector family.
Typically, OEMs use the backplane reference designs or platforms in two ways. In some cases, OEMs may want the reference information for validation of what they've done already. In other instances it may save them months of design time if they don't have on-staff engineers who have done a lot of high-speed designs.
In addition to providing the reference platforms, connector manufacturers can also make recommendations on signal routing to effectively utilize the interconnect device, and on attaching the connector to the backplane or daughtercard to minimize the impact on signal integrity. They also provide technical information and 3-D or Spice modeling for key electrical characteristics such as crosstalk, impedance, insertion loss and attenuation.
"Partnering with chip vendors on reference designs is a piece of it," said Dave Helster, director of Tyco Electronics' circuit and design group (Harrisburg, Pa.). "The genesis of that strategy is to make it easier for a customer to implement our products. He doesn't have to worry about the 60 other items-trace width, materials, board thickness, etc. That is why you're seeing a lot of people take that on."
Previously, with low-speed signals, a designer could use a connector off the shelf and the primary factors were mechanical and packaging; the electrical performance wasn't the driving factor, said Gautam Patel, signal integrity engineer for Teradyne Connection Systems (Nashua, N.H.). Today, that has changed.
"In high-speed applications, more things can go wrong," Patel said. "You need to pay a lot more attention to the connector and backplane and the way you design it, and which connector you choose," he said. "We try to take our collective experience in backplane and connector design with the silicon vendor's design and put it all together to develop the best general backplane system that we can."
With reference designs, vendors try to explore all the best-case and worst-case scenarios with the appropriate intermediate links that might be used in the real world, said Gus Panella, engineering manager for Molex Inc.'s advanced development group (Lisle, Ill.). "To try to make the best cost-effective solution, which is what all us engineers go for, you might spend a little more for a connector and get a cheaper transceiver," Panella said. "Or sometimes a more expensive transceiver is a better value. You play that game, and look at the interconnect budget not only as a function of electrical performance or bit rate but at dollars and number of lines."
These designs take a number of factors into consideration including signal routing, crosstalk, trace geometries, printed-circuit-board material, thickness and length, and characteristics of the silicon itself. "Some silicon provides different advantages," Tyco's Helster said. "Some chips are more sensitive to near-end noise; some are more sensitive to far-end noise; and some may require better throughput."
As a designer, he went on, it's necessary to decide what kind of silicon to use and then take into consideration the interconnect portion, which includes the daughtercard, lines from the daughtercards, backplane, pcb materials, connector and how the connector attaches to the pc boards. "It's really an entire system issue," Helster said.
"A big variable in these designs is the connector and how it attaches to the pc board and how you handle the interface to the circuit board," he said. For example, whether or not you have a top layer connection or bottom layer connection can result in very different performance, Helster said.
Lattice, Accelerant on board
Tyco had some of the first silicon references designs in the market for its high-speed connector systems. For example, Tyco and Lattice Semiconductor Corp. have demonstrated 3.7-Gbit/second serdes speed, signal integrity and extended drive length over FR-4 backplanes running on Tyco's HM-Zd-based platforms with Lattice's high-performance field-programmable system chips, the ORT82G5 and ORSO82G5 transceivers.
Most recently, Tyco and Accelerant Networks (Beaverton, Ore.) completed testing of Accelerant's new AN6000 family of low-power high-speed serializer/deserializer transceivers over three of Tyco's Z-Pack HM-Zd connector reference backplanes at 10 Gbits/s per individual backplane interconnect. The connector reference backplanes were designed to emulate real-world conditions of existing network, server and storage backplanes.
Teradyne Inc. and Accelerant also jointly validated Teradyne's high-speed VHDM, VHDM-HSD and GbX connector platforms using Accelerant's AN6000 serdes transceiver products. Greater than 6.25 Gbits/s was achieved over 12 to 36 inches of backplane. What's equally important is that validation and characterization of the Teradyne backplane reference platform took less than two days using Accelerant's "lab-in-a-chip" integrated test equipment for active and passive diagnostics, compared with a typical requirement of six to nine months, said the company.
For silicon vendors, it's important to have a good working understanding of what the connector folks are doing. At speeds beyond 3 Gbits/s, the synergistic influence of the passive elements in the interconnect panel on the transceiver is very significant, said Bill Hoppin, vice president of marketing for Accelerant Networks.
A backplane interconnect solution that includes the transceiver, connector, backplane materials and design techniques is an interactive system, Hoppin said. For example, the type of connector used affects the type and approach of equalization within the transceiver, and it affects the material type for the backplane and design techniques such as back-drilled vias that you need or don't need, he said.
By analyzing more than 60 different backplane systems, Accelerant has discovered that it takes a tremendous amount of engineering to solve the interaction between the transceiver and the backplane from initial design to shipment to production, and that environmental and manufacturing conditions induce a tremendous amount of variations.
"At higher speeds, these variations and interactions become significantly more pronounced and that is one of the reasons why it's essential to understand and ensure as a transceiver vendor that we design for the range of connectors and range of backplane implementations to provide a robust, adaptive solution that can adapt to a wide range of environments," Hoppin said.
While the design issues are the same, in terms of scaling up in speed, some companies would like to see how much of their infrastructure-their existing backplane-they can use, said Joe Nelligan, director of marketing at Molex, where he is involved in new-product development. In some cases, they may only have to change a line card or change the connector on the daughtercard, he said.
As a result, some reference designs target legacy systems. For example, Tyco and Velio Communications have demonstrated a 6.25-Gbit/s backplane solution illustrating the feasibility of operating legacy backplanes at serial line rates in excess of 6 Gbits/s. Velio says that its next-generation GigaCore2 serial I/O technology enables existing backplanes to scale in performance and density while maintaining backward compatibility with existing line cards.
Teradyne teamed up with Rambus Inc. (Los Altos, Calif.) to demonstrate a 10-Gbit/s backplane solution for legacy backplane systems, using existing Teradyne high-speed VHDM-HSD and GbX connectors, materials and real-life networking/storage backplanes with Rambus' 10-Gbit/s serial-link interface, RaSerX. The reference platform was designed to help customers characterize and analyze the signal integrity of deployed backplane subsystems, the companies said. Teradyne's Patel said this gives customers a good starting point for their designs using standard backplane materials.
Teradyne also has demonstrated 6.25-Gbit/s performance across 60 inches on an FR-4 backplane with semiconductor startup Vativ Technologies Inc. (San Diego) for high-speed networking line cards using Teradyne's VHDM-HSD and GbX connectors and Vativ's M5-BP transceiver.
Earlier this year, Tyco released its HM-Zd legacy interoperability platform, which provides a backplane representative of those seen in typical system environments in order to help customers extend the life of their Z-Pack HM-Zd connector. The two key backplane modifications were that the board materials be changed to Nelco 4000-6 and that a trace width of 6 mils or less be used. The backplane offers links that are eight lanes wide in each direction, which provides full-duplex 40-Gbit/s paths when the individual lanes run at 5- to 6.25-Gbit/s speeds.
Connector choices expand
Meanwhile, connector manufacturers such as Fujitsu, Molex, Teradyne and Tyco have continued to expand their high-speed connector lines over the past year. For instance, Fujitsu has expanded its microGiGaCN line with introduction of its FCN-260D and FCN-261Z00x. The FCN-260D is an I/O plug with thumbscrews that supports Serial Attached SCSI four-lane, Serial ATA-2-4-lane and 10-Gbit Fibre Channel configurations. The FCN-261Z00x is a matched-impedance loop-back module for testing systems operating at 500 Mbits/s to 3.2 Gbits/s per channel.
Fujitsu, in partnership with Mysticom, plans to release a CX4-compliant Xenpak 10-Gbit/s Ethernet module for copper in December. This introduction will mark Fujitsu's entry into the module business.
Teradyne (second-sourced by Molex) has also expanded its high-speed connector lines with the introduction of a VHDM-HSD six-row module-to-backplane connector system and VHDM eight-row right-angle male connector (VHDM RAM). The VHDM-HSD six-row connector system is used for linking the main backplane to daughtercards in very high-speed, short-rise-time and high-circuit- count applications for up to 5-Gbit/s bandwidth per signal pair.
The VHDM RAM offers a higher-density solution of 100 signals per inch, and is used as cable I/O interfacing to the edge of a daughtercard, planar extender card applications and straight I/O into the right-angle female VHDM connector, the company said.
FCI Electronics (Etters, Pa.) recently launched a unique high-speed connector line touted to offer a greater cost/performance advantage with a new proprietary design. The company's CDC division designed the AirMax VS connector system for high-speed computing and network systems. It features what FCI calls "virtual shields" that use air as a dielectric, to eliminate the need for interleaving shields. This is said to reduce both weight and cost and to improve board-layout flexibility.
FCI claims the AirMax VS is the industry's first shieldless high-speed connector operating at 2.5 to 6.25 Gbits/s, with scalability to greater than 12 Gbits/s (see Oct. 13, page 75). A key design element is that users won't have to redesign the basic platform when scaling up in speed, the company said.
The AirMax VS connector platform addresses the cost of both materials and labor, said Rick Lewis, director, industrial and military markets, for Bishop & Associates Inc. "No metal shields means less weight and lower cost," he said. "With no necessity for shields, a simpler assembly process would result."
The stated performance of the connector is state of the art, but the true test will come at the hands of OEMs who will put it through extensive testing programs, said Lewis.
Fujitsu Components America Inc.
Teradyne Connection Systems, a division of Teradyne Inc.