Traditional methods for connecting redundant power supplies usually involve placing a diode in series with each power supply output and tying either the cathodes or anodes, depending on whether the power supply is positive or negative, together at the load.
This is commonly referred to as diode OR-ing and, although simple, is far from an ideal solution. Flaws include power losses, uncontrolled inrush current, and no overcurrent control. Some of those weaknesses can be effectively addressed by the addition of a hotswap controller, but a complete solution is possible using the TPS2350 and no OR-ing diodes.
The alternative is a power supply with programmable features such as undervoltage (UV) and overvoltage (OV) limts, current limit, current slew rate, circuit breaking and a fault timer to prevent nuisance trips, all with only a fraction of the power loss typical to OR-ing diode solutions. The article illustrates how the TPS2350 integrates these functions with an intelligent selector, which draws current from the power supply with the greatest voltage magnitude. The total solution uses less than ten external components, minimizing footprint and cost.
Redundant Power Supplies - The Diode OR-ing Method
Figure 1 shows the traditional implementation of a redundant -48V telecom power supply system. The supplies might be batteries, rectified and bucked line voltage, or the output of a DC-DC converter.
Figure 1: Diode OR-ing of Redundant Supplies
The design's major functions ensure that load has at least one backup power source and that neither supply appears as a load to the other. This design performs both functions but does nothing to protect against voltages and currents which "go out of bounds". The diodes can easily supply the voltage and/or current necessary to destroy downstream electronics.
The diode losses in a diode OR-ing scheme are calculated by multiplying load current by one diode drop. Other than using Schottky diodes with a low forward voltage drop there is little the designer can do to reduce the losses.
Ploss in diode OR-ing solution
Ploss= ILOAD x VF diode
If the diodes are replaced with FETS and a controller, the losses are the square of the load current multiplied by the FET resistance ( RDSON).
Ploss in FET OR-ing solution
Ploss= I 2 LOAD x RDSON
Now we compare the losses of a 10 Amp supply using Schottky diodes with VF = 350 mV to a FET OR-ing solution using FETs with RDSON = 8 mΩ.
Ploss in diode OR-ing solution
Ploss= ILOAD x VF diode = 10 x .35 = 3.5 W
Ploss in FET OR-ing solution
Ploss = I 2 LOAD x RDSON = 102 x .008 = 0.8 W
The reduction in power loss is significant. The FET solution has less than a quarter the loss of the diode solution with no reduction in performance.
Redundant Power Supplies - The Low Loss, No Diode Method
The TPS2350 operates with supply voltages from -12 to -80 Volts and, in addition to selecting the appropriate power source, provides complete hot swap protection regardless of the channel selected.
During normal operation the TPS2350 will maintain two of three external FETS in a fully enhanced state to provide power to the load, in this case Q1 and Q2, or Q1 and Q3, depending on whether VINA or VINB is the selected power source (See Figure 2). Regardless of which supply is selected, Q1 performs current ramping and circuit breaker functions when power is turned on or when an overload condition occurs.
Q2 and Q3 are used solely to select the power source and are never on at the same time. They perform the diode's function in the diode OR-ing scheme. Figure 2 shows a typical TPS2350 configuration with the necessary Rs and Cs to program all protection functions.
Figure 2: TPS2350 Control of Redundant Supplies
PLoss of TPS2350 Supply Selection Circuit
The losses in a TPS2350 controlled redundant supply are a function of the load current, RSENSE, and RDSON of the external FET. The losses are shown below for a TPS2350 controlled 10 Amp supply with 8 mΩ control FETs and Rsense equal to 10 mΩ
Ploss= I2LOAD x ( RDSONQ1 + RDSONQ2+ RSENSE) = 102 x .026 Ω = 2.6 W
If this system were to use Schottky OR-ing diodes with VF =350 mV instead of FETs for supply selection the power loss would be calculated as shown below.
Ploss= ( ILOAD x VF diode ) + (I2 LOAD x (RSENSE + RDSON)) = 3.5 + 1.8 = 5.2 W
The example diode OR solution loses 5.2 watts, which is twice the losses of the TPS2350 solution. It is critical to properly size the FETS to the load in order to control I2R losses. An undersized FET can actually have higher losses than a diode at high currents. Fortunately, the selection of low RDSON FETs is getting better each day and the designer has the flexibility to select whatever FET best meets the need. If the design calls for even lower RDSON, a second, third or fourth FET maybe put in parallel. Table 1 lists a small sample of FETS available today.
Table 1 Sample of Low RDSON Power FETs
Selection of Q1 isn't as simple as selection of Q2 and Q3 because Q1 is in the saturation region with high voltage and high current during turn-on. Consequently, Q1 will have a high power dissipation surge and must be rated for such.
Supply Selection " or "How Does the 2350 Know Which Supply to Draw From ?"
The supply select comparator will drive GATA or GATB depending on which supply is more negative, as sensed at pins VINA and VINB (See Figure 3). 400 mV of hysteresis is built into the supply select comparator. 400mV is small enough to prevent forward biasing of the body diode in whichever FET is turned off, yet large enough in most cases to prevent "toggling" between supplies when IR drops in the supply lines cause the "just turned on" supply voltage to droop. If system requirements dictate, components can be added to set hysteresis at a higher level.
Undervoltage Lockout ( UVLO )and Overvoltage Lockout ( OVLO )
UVLO and OVLO are set using R1, R2 and R3 in a standard three-resistor ladder network. This circuit defines the input voltage window, which enables the output. In order to extract as much power as possible from a battery system, the accuracy of the UV comparator has been set to a very tight 0.93 percent from 0 to 70 degrees. This precision not only allows for longer operation on a back-up battery, but reduces the need for expensive precision resistors in the power supply design.
Controlled Current Turn-On and Current Limiting
A significant advantage of the TPS2350 over existing solutions is the controlled current turn-on which delivers smooth load voltage ramping, regardless of load characteristics. This allows the use of less expensive FETs and provides the capability to drive virtually any load with minimal risk of excessive current.
Setting the current ramp controls maximum di/dt as the FET's are turning on. Using CRAMP to set di/dt to a maximum value helps prevent disruptive, or possibly destructive, EMI from propagating through the system far more effectively than the common approach of limiting dV/dT. This familiar problem is caused by the large bulk capacitance lurking downstream, which appears as a short when the module is first plugged in.
To set the turn on current slew rate, an external capacitor is connected between RAMP and SOURCE. During turn-on, the TPS2350 charges this capacitor to establish the reference input to the LCA at 1 percent of the voltage from RAMP to SOURCE. The closed-loop control of the LCA and the pass FET maintain the current-sense voltage from SENSE to SOURCE at the reference potential, so the load current slew rate is directly set by the voltage ramp rate at the RAMP pin. When fully charged, RAMP can exceed SOURCE by 6V, but the reference is internally clamped to 40mV, limiting load current to 40mV/RSENSE. When the output is disabled via OV, UV, or due to a load fault, the RAMP capacitor is discharged and held low to initialize for the next turn-on.
Controlling maximum current to the load by setting RSENSE is another important feature which prevents harmful current surges from propagating and can allow the use of smaller FETs. This also functions as a circuit breaker and will shut off power load if load current exceeds the threshold as set by RSENSE.
Fault Timing and Output
The FLT# output is an open drain active-low indication that the 2350 has shut down due to a faulted load. If the load current stays limited for more than the fault time as set with the FLTTIM capacitor, or if the load current produces more than 100mV on the current sense resistor for more than 3μs, a fault has occurred. Whenever the fault latch is set, timer expired, GAT and FLT# are pulled low. FLT# is cleared when both supplies drop below the UV-comparator threshold or one supply exceeds the OV-comparator threshold. The FLT# output is pulled to the lower of "VINA and "VINB.
Fault time is set using an external capacitor between FLTIM and SOURCE. The larger the capacitor, the longer a fault condition must occur to be declared a fault. This timeout protects against indefinite current sourcing into a faulted load while providing a filter against nuisance trips from momentary current spikes or surges.
The TPS2350 provides TSSOP and SOIC solutions to power supply selection in a redundant power system while providing a full array of programmable hot swap functions. The TPS2350 is flexible and simple to use without the weaknesses associated with the traditional diode OR-ing solution.
As telecom signal processing voltages continue to drop, the currents continue to rise. Active, intelligent hot swap and circuit breaking capability are becoming more important requirements in redundant systems for reliability and safety.
Figure 3: TPS2350 Functional Block Diagram
About the author
Jim Bird is with Systems Engineering for the Power Interface Products Group of Texas Instrument's High Performance Analog Division in Manchester, NH.