When using operational amplifiers, optimizing the layout to achieve the lowest large-signal distortion appears to be an abstract problem. A part might provide distortion as low as "100 dB when evaluated on a board provided by the manufacturer, but might get 10 dB worse when it is plugged into the user's system, lowering the performance from 16 bits to 14 bits. The performance might also degrade when one package is used during evaluation, but a different package is used in the final system. When layout and packaging-related distortion is understood it can be corrected, and the overall system performance can be improved substantially.
Load-induced second harmonic distortion commonly limits an amplifier's distortion performance. This can be particularly troublesome with low noise parts, as the feedback resistance needs to be low to keep the total output noise down and, thus, presents a significant load to the amplifier. Two common causes of load induced second harmonic distortion are crossover distortion in the output stage and package effects. The crossover distortion is related to both the quiescent current in the output stage and the amount of load current it must supply. With increasing load current, more quiescent current is required to maintain a constant level of distortion. Amplifiers output stages intended for low noise, low distortion applications can be designed to provide the required distortion performance at the rated loads, leaving package-related effects as the remaining distortion limitation.
Look where the current flows
The standard pin out for a single amplifier, shown in Figure 1, places the positive input of the amplifier next to the negative supply pin. When the amplifier sinks current from the load, the load current is returned to ground via the negative supply pin. Mutual inductance coupling between the negative supply pin and the positive input creates an error at the summing junction that is proportional to the magnitude and frequency of the changing current through the supply pin. With sinusoids, sinking current only occurs in one half of the cycle, so the distortion shows up as a second harmonic of the fundamental. This is an input referred error, so the problem gets worse with higher closed loop gains.
Figure 1: Standard SOIC pin-out showing inductive coupling.
All classical pin outs, including the SOT-23, single/ dual SOIC, and single/dual micro-SOIC share this coupling problem. Dual operational amplifiers have another burden, as one amplifier sinking and sourcing large currents can distort the output of the other amplifier. This distortion is known as crosstalk.
A new pin-out for single op amps separates the inputs from the supply pins, as shown in Figure 2. The pins have been rotated counter-clockwise by one, and the inputs are now on the opposite side of the package as the power supply pin. This eliminates the coupling.
Figure 2: Altered pinout to remove inductive coupling.
The improvement in second harmonic distortion can be seen in Figure 3, where the same die was bonded out using the standard pin out of Figure 1 and the pin out shown in Figure 2. With a gain of 5, and a 10-MHz, 2-Vpp output signal, changing the pin out results in about a 15-dB improvement, extending 14-bit performance out to 10 MHz.
Figure 3: Distortion comparison of standard pin-out and rotated pin-out distortion performance.
In addition to packaging, the PCB layout, grounding, and bypassing must also be considered in order to minimize distortion. All signals are measured with respect to a reference. For operational amplifiers with single-ended outputs that reference is usually ground. The problem with ground is that it can vary dramatically depending the measurement location on the board.
Bypass capacitors too
Figure 4 shows the proper layout of the board to ensure ground integrity and minimize distortion. The input termination, feedback network and bypass capacitors in this circuit all terminate at "ground." Any variation among these "grounds" can cause errors in the circuit output. Displacement currents from the bypass capacitors are half-wave rectified versions of the output. When injected into ground plane resistance and inductance, these currents can degrade second harmonic distortion. This problem does not exist in single supply circuits with the load referenced to ground, but similar caution must still be taken with the board layout.
Figure 4: Schematic showing common ground terminations for improved distortion performance.
The bypassing scheme shown ensures that both high frequency supply currents go into the same ground point, fixing both supplies and all of the other critical terminations to that single ground point. Terminating each supply separately through a bypass capacitor to ground is also acceptable, as long as that ground point is the same for both bypass capacitors and the paths for both bypass capacitors have low series resistance. It is usually easier to bypass the supplies as shown.
Understanding the mechanisms that create distortion in operational amplifiers makes part and package selection more routine. Once the part and package has been selected, creating the layout that results in peak performance is accomplished through proper termination of all inputs, bypass capacitors, and output loads to a solid ground plane. Following these guidelines will ensure that the signal integrity is maintained to within the limits of the operational amplifier rather than the integrity of the ground plane. --