WAYNE, N.J. " Analog Devices Inc. brought a digital upconverter to market this week that will reduce crest factors by up to 7 dB in wideband CDMA, cdma2000, and time-division, synchronous CDMA (TDSCDMA) wireless basestation designs.
While OEMs focus on predistortion performance in basestation line cards, Analog Devices looks to reduce the crest factor " the gap between peak and average power in single-channel and multichannel power amplifier architectures.
"In emerging W-CDMA and cdma2000 designs, crest factor can be as large as 13 to 14 dB," said David Duff, business development manager at ADI (www.analog.com; Norwood, Mass.). "Equipment vendors would really like to see the difference between peak and average power in the 6- to 8-dB range."
Some design houses have attacked crest factors with a clipping technique in their upconverter designs. But that can increase adjacent channel interference and hurt overall system performance, Duff said.
ADI took a different approach with its four-channel AD6633bbc and six-channel ADC6633cbc VersaCrest converters. They incorporate an algorithm that looks at all channels and predicts errors that will cause peaks in a CDMA signal. Then the upconverter can insert co-channel interferers at the input of the channels to account for these peaks, thus reducing crest factor, Duff said.
Designers using the ADC6633 can choose how much co-channel interference to insert at each channel. They have the option to evenly distribute 25 percent of the interference to all channels on a four-channel chip, or spread the interference unevenly across the channels, Duff said.
The algorithmic approach does not affect the channel in the frequency domain, a big benefit. "We don't degrade chip performance," Duff said. "We don't introduce any adjacent channel interferers."
That's not to say that the approach doesn't affect chip performance, however. Duff admitted that it degrades error vector magnitude (EVM) performance, a time-domain measure.
Still, designers might risk slightly degraded performance to cut overall power costs in a system design. By reducing the crest factor, Duff said, designers could lower power amplifier output power requirements by 50 percent, cutting amplifier costs by as much as 50 percent reduction. With amplifier costs running hundreds of dollars per watt, that reduction can lead to a big savings in total system cost, he said.
Both parts are developed in a 0.18-micron CMOS process and are sampling now. Volume production is slated for the summer. In 10,000-unit quantities, the four-channel device will be offered at $40 apiece, while the six-channel part will be offered at $60.