The results of a second annual worldwide design trends survey indicates a significant increase in ESL methodology adoption is brewing, and that much of the growth is actually not covered by traditional market analysis. More than 40 percent of the market is outside the realm of hardware and semiconductor design. Analyst coverage traditionally focuses on the "chip" side of the market.
Headlining the survey 58 percent of designers recorded intent to increase their use of ESL design, with SystemC usage set to increase three-fold in next design projects. In 2006, 20 percent of FPGA designs will exceed five million gates and more than two-thirds of designers will use FPGAs coupled to an embedded processor, off-chip processor or DSP. FPGA based prototyping maintains its critical role in ASIC development, with 69 percent of ASIC designers reporting usage. FPGA designs with clock frequencies above 500Mhz are set to treble in 2006, though this figure is still well down on 500Mhz and greater than 750Mhz ASIC design numbers.
The survey, conducted by Celoxica and Electronics Weekly took place between May and mid-July this year, incorporated the responses from 723 designers to more than 30 questions regarding current an future design activity.
"The survey confirms our experience that ESL design and programmable silicon are pushing the boundaries of EDA growth," said Jeff Jussel, vice president of marketing at Celoxica. "We are seeing adoption of ESL design acceleration across the board. Increasing size, complexity and the use of multiple HW and SW components and SoC in new designs mean that trend will continue."
While the survey results paint a positive picture for growth in FPGA design starts and usage, it paints a bleak picture regarding the readiness of designers. A whopping 86 percent of those responding report no training in ESL design languages and nearly 25% cite education and training as a key issue in encouraging ESL adoption.
ESL design is increasingly used by designers of both ASICs and FPGAs; the largest growth is reported by systems and software engineers and algorithm developers. These designers will become increasingly important to EDA vendors and programmable logic vendors, but hardware engineers predominate in FPGA and ASIC design.
It is expected that the impact of increased ESL design adoption on EDA tools will be carefully measured over the next 12-18 months as the increased use of ESL design languages begins to be seen. This impact is expected most in design entry, FPGA synthesis and ASIC/SoC prototyping and verification. By working harder, ESL vendors can help accelerate adoption of ESL languages, tools, and methodologies.
FPGAs and ASICs are increasingly coupled to or integrated with embedded or off-chip uP and DSP. Embedded software is becoming increasingly important as is co-design, both accounting for growth of ESL tools and methodologies.