SAN FRANCISCOXilinx Inc., Altera Corp. and Actel Corp. each issued statements highlighting their plans for the Embedded Systems Conference Silicon Valley to be held next week at the McEnery Convention Center in San Jose, Calif.
Xilinx (San Jose) said it would showcase targeted design platforms and provide demonstrations of the Virtex-6 and Spartan-6 FPGA families, introduced earlier this year. Xilinx said it would also conduct hands-on workshops and technical presentations in addition to demonstrations at its booth (No. 1420).
Altera (San Jose) said it plans to showcase its programmable logic and embedded technologies, including sponsored technical sessions, in-booth demonstrations (booth No.1044) and a conference paper.
Actel (Mountain View, Calif.) said it would offer a free hands-on training session on how to implement the company's royalty-free ARM Cortex-M1 processor into the Actel Fusion mixed-signal FPGA. The session will be held Tues., March 31, from 2:30-4 p.m. and be led by Wendy Lockhart, senior manager of design solutions, the company said.
Xilinx free hands-on workshops
Attendees can register for one of two on-site, 90-min workshops providing hands-on experience building FPGA-based embedded and/or digital signal \processing systems using Xilinx targeted design platforms. ESC attendees can sign-up for these workshops at Xilinx booth (No. 1420) or meeting room N.
Implementing an HD-video control planeTues., March 31, 11 a.m., 1 p.m., 3 p.m. & 5 p.m.
FPGA-based co-processing for DSPs using model based design Wed., April 1: 11:30 a.m., 1:30 p.m., 3:30 p.m. & 5:30 p.m.; Thurs., April 2: 11 a.m., 1 p.m., & 3 p.m.
Real-time demonstrations and live theater presentations at booth No. 1420
Tues., March 31, Noon-8 p.m.
Wed., April 1, 11:30 a.m.-7 p.m.
Thurs., April 2, 11:30 a.m.-4 p.m.
Technical papers by Xilinx distributor, Avnet
Avnet: ESC-420 Implementing DSP Functions within FPGAs RC Cofer, Ben Harding, Scott Calkins, Thurs., April 2, 2 p.m.-3:15 p.m.
Avnet: ESC-442 Designing with FPGAsRC Cofer, Ben Harding, Thurs., April 2, 3:30 p.m -4:45 p.m.
Altera ESC sponsored session topics
Designing embedded systems with FPGAsPresented by Rodney Frazer, Altera, Tues., March 31, 3:45 p.m"5:15 p.m. in room C1; Wed., April 1, 2 p.m.-3:30 p.m. in room K.
Designing ARM embedded systems in Altera FPGAs and ASICsPresented by Steven Kravatsky, Arrow Electronics, March 31, 5:30 p.m."7 p.m. in room C1; Wed., April 1, 3:45 p.m.-5:15 p.m. in room K.
Building embedded video systems with FPGAsPresented by Suhel Dhanani and Xiaofei Dong, Altera, Wed., April 1, 8 a.m.-9:30 a.m., in room K; 5:30 p.m.-7 p.m. in room K.
Altera conference paper Aerospace and military track
Fail-Safe FPGA Design Features for High-Reliability SystemsPresented by Paul Quintana, Altera, Thurs., April 2, 3:30 p.m.-4:45 p.m. in room C2.
Xilinx and Altera each plan several product demonstrations in their respective booths.
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