MUNICH, Germany Infineon reports a major breakthrough in semiconductor technology, promising significant reductions in space and leakage currents.
The company succeeded in building a complex circuit using multi-gate transistors with 65nm feature size. While the technology of dual-gate or tri-gate transistors is not entirely new, it is the first time a semiconductor manufacturer has built such a complex circuit using this approach. The circuitry tested by Infineon contained a number of logic circuits such as NAND or NOR Gates, ring oscillators and other elements, adding up to more than 3.000 transistors.
Using the multi-gate transistor allows for a 30 percent reduction in size compared to single-gate (planar) designs. In addition, the technology allows for a reduction of standby currents by 90 percent without compromising speed or functionality. For these reasons, the technology would be ideally suited for mobile low-power applications, the company said
In order to build the chip, Infineon had to optimize the multi-gate transistor technology and carry the architecture over to standard CMOS manufacturing processes, a company spokesperson explained. Thus, the multi-gate devices can be produced in conventional processes available today. The technology can use bulk-silicon as well as silicon-on-insulator substrates.
The chip tested was made with 65nm feature sizes. However, in smaller geometries such as 45nm or 32nm, the advantages of the multi-gate transistor will increase significantly, explained Klaus Schrüfer, Principal Scientist for CMOS Device Innovation at Infineon.
Infineon developed the multigate circuitry in a project at the Belgian IMEC research center, Infineon owns the rights to produce the technology. Volume manufacturing is five to six years away, Schrüfer said. The research necessary to bring the technology to industrial application will in parts be carried out together with IMEC. Preparation for inhouse design and design-flow capabilities is already under way at the Infineon headquarters in Munich.
Since Infineon's manufacturing strategy, as explained by CEO Wolfgang Ziebart, does not include investments in semiconductor fabs beyond the 65-nm node, the company intends to work together with its foundry partners once the technology is ready for volume manufacturing. "Thus, we can benefit from the multigate technology without having to invest in new fabs", explained Schrüfer.