Micromega Corporation announces the release of the uM-FPU V3.1 Floating Point Coprocessor chip. The new chip extends the powerful feature set of the original uM-FPU V3 chip to include serial I/O support, NMEA sentence parsing, block transfers, additional matrix operations and string support, and many other enhancements.
The new serial I/O capabilities with NMEA sentence parsing makes it easy to add GPS data to embedded system designs. GPS data can be read and processed directly by the uM-FPU V3.1 chip, saving I/O pins, memory space and execution time on the microcontroller, which can then be used for the main application. As an added benefit, GPS data is immediately available on the uM-FPU V3.1 chip for further navigational calculations using the powerful floating point instruction set.
The uM-FPU V3.1 chip interfaces to virtually any microcontroller using an SPI interface or I 2 C interface, making it ideal for microcontroller applications requiring floating point math, including GPS, sensor readings, robotic control, data transformations and other embedded control applications.
The uM-FPU V3.1 chip supports 32-bit IEEE 754 compatible floating point and 32-bit integer operations. Advanced instructions are provided for fast data transfer, matrix operations, multiply and accumulate, FFT calculations, serial I/O, NMEA sentence parsing and string handling. The chip also provides two 12-bit A/D channels, two digital outputs, an external event counter, Flash and EEPROM storage, and serial I/O up to 115,200 baud.
The uM-FPU V3 IDE (Integrated Development Environment) makes it easy to create, debug and test floating point code. The IDE code generator takes traditional math expressions and automatically produces uM-FPU V3.1 code targeted for any one of the many microcontrollers and compilers supported. The IDE also supports code debugging and programming user-defined functions. User-defined functions can be stored in Flash using the IDE, or stored in EEPROM at run-time. Nested calls and conditional execution are supported. User-defined functions can provide significant speed improvements and reduce code space on the microcontroller.
The uM-FPU V3.1 chip is RoHS compliant and operates from a 2.7V, 3.3V or 5V supply with power saving modes available. SPI interface speeds up to 15 MHz and I 2 C interface speeds up to 400 kHz are supported. The chip is available in an 18-pin DIP, SOIC-18, or QFN-44 package. The single unit price is $19.95 with volume discounts available.
For more information, contact:
Micromega Corporation 1664 St. Lawrence Ave. Kingston, ON K7L 4V1 Tel: 613-547-5193
For additional information regarding this product announcement please contact:
Cam Thompson President Micromega Corporation Tel: 613-547-5193 Email: email@example.com
Note: The above text is the public part of the press release obtained from the manufacturer (with minor modifications). EETimes Europe cannot be held responsible for the claims and statements made by the manufacturer. The text is intended as a supplement to the new product presentations in EETimes Europe magazine.