The Linley Group is offering a seminar on high-speed interconnect on May 9
in San Jose. The day-long seminar focuses on the newest products and
technologies for PCIe, RapidIO, Ethernet and other leading interconnects.
The morning session zeroes in on the latest developments in system-level
interconnects, while the afternoon session addresses the physical layer
for Ethernet at 10Gbps and beyond. The seminar is designed to provide you
with the critical information you need in determining the appropriate
technologies and products for your designs.
The lineup of presenters includes:
George A. Zimmerman, CTO, Solarflare Communications, will present
"Delivering 10GBase-T Silicon"
Alex Dickinson, President and CEO, Luxtera, speaking on "Silicon
Photonics - The Next Wave in Low-Cost, High-Performance Optical
Sanjay Kasturia, CTO, Teranetics, will present "10GBase-T: A Technology
for Upgrading LANs"
Peter Yan, System Engineer, Freescale, speaking on "High-speed
Interconnect Support for Quadruple-play Convergence"
Jeff Dodson, Principal Director of Engineering, PLX Technology, will
present "Measuring Performance for PCIe Systems"
Brad Booth, Senior Principal Engineer, AMCC, speaking on "10Gbps
Ethernet for the Enterprise"
Bernhard Friebe, Sr. Product Marketing Engineer, Altera, will present
"High-Speed FPGA Interconnect Solutions"
Kimkinyona Fox, Product Marketing Manager, Rambus, speaking on
"Integration Considerations for High-Performance I/O"
Devashish Paul, Product Marketing Manager, Tundra, speaking on
"Developing Wireless Infrastructure using ATCA and RapidIO"
Ken Curt, Product Manager, Pericom, will present "Extending Reach for
PCIe and Modern Interconnects"
Following the closing panel will be a networking reception, complete with
exhibits and a raffle, providing the opportunity for attendees to meet
with industry leaders, speakers, analysts, designers, and their colleagues
Admission is free to qualified individuals who register by May 4. The
seminar is intended for OEMs, board developers, software developers,
press, and the financial community. The seminar will be held at the
DoubleTree Hotel in San Jose and is sponsored by Freescale, AMCC, Altera,
Rambus, Pericom, Teranetics, Solarflare, Tundra, and The Linley Group.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.