Venice, Florida — ARM and Carbon Design Systems announced today an agreement under which Carbon will take over future development, support and sale of ARM's SoC Designer tool. Key members of the ARM SoC Designer development team will join Carbon Design Systems and form a new Carbon development office located in Irvine, California. Carbon will also gain access to ARM intellectual property (IP) in order to optimize its tools to generate cycle-accurate models of ARM processors, PrimeCell® peripherals and fabric IP. This will enable ARM Partners to create cycle-accurate models of ARM IP, and provide a seamless transition for users of the SoC Designer tool to a new environment based upon models generated directly from ARM register transfer level (RTL) code.
"The ability to optimize the Carbon tool chain to work seamlessly with ARM's intellectual property is a natural extension of Carbon's model-focused strategy," said Rick Lucier, CEO of Carbon. "The majority of our customers are already using ARM IP in their system on chip (SoC) designs. This agreement will enable our company to deliver a complete cycle-accurate tools solution to our customers, enabling the generation of models derived directly from the IP RTL code."
In previews interviews ARM representatives had expressed the belief that ARM had to develop and market its own development tools because it could not count on the timely collaboration of a third party. This position is similar to those of both Altera and Xilinx, who continue to be very skeptical of timely support by third parties for their new products. Following the agreement, John Cornish, vice president and general manager, ARM System Design Division stated that, "The agreement between ARM and Carbon will ensure customers have access to a fast, cycle-accurate design environment in which they can architect and validate advanced SoC designs based on ARM IP." The agreement between ARM and Carbon reinforces the capitalistic reality that good IP and good silicon generate their own profitable market for development tools and systems.
"This agreement gives Carbon access to ARM IP to optimize our automated cycle-accurate model creation tools for all of ARM processors and PrimeCell IP including the latest Cortex™-A9 application processor. The processor models will also leverage the Carbon model application programming interface (API) to offer a direct connection to the ARM RealView® Debugger. Carbon-generated models of ARM IP will offer the fastest, most-accurate path for firmware development and architectural exploration." said Tom Rathje, vice president of Engineering at Carbon.
A Growing Presence in the ESL Market
Bill Neifert, Carbon's CTO and founder, took the opportunity to elaborate on some of the consequences of the agreement in an email interview with EDA DesignLine.
EDA DesignLine: I understand that there should be no changes in the relationships with either MIPS or Coware in the short term.
Bill Neifert: We believe we are complementary and will continue to support our partners with our latest modeling technology. Customers have a choice of virtual platforms and we will support our customers' choices with Carbon Model Studio, irrespective of which platform is used. Carbon has already met with CoWare, MIPS and other partners in the ESL space to inform them of this announcement. The discussions were also meant to look at areas to expand our partnership, based on the cycle-accurate model methodology that Carbon will be putting in place for ARM processor and peripheral IP.
EDA DesignLine: Is it possible that the acquisition could help Carbon strengthen its relationship with other vendors of IP to allow the same level of debugging within the SoC Designer tool now enjoyed by ARM processors?
Bill Neifert: Absolutely. We are focused on modeling and now have a cycle-accurate virtual platform, but will continue to make available our model technology to all platforms. The Axys technology, purchased by ARM to form the SoC Designer product, originally had support for additional processor models such as those from MIPS and CEVA. It is Carbon's intent to revive those integrations and make SoC Designer a valuable platform for performing architectural analysis on SoCs made of IP from multiple vendors, not just ARM.
EDA DesignLine: What are the major functional differences between SoC Designer and Coware's Platform Architect?
Bill Neifert: The main areas of functional difference between SoC Designer and Platform Architect are the execution model and the profiling approach. SoC Designer is a cycle-based execution engine and Platform Architect is event based. If a designer is executing a completely cycle-accurate system, that system should execute more quickly in SoC Designer than in CoWare. Conversely, the cycle-based architecture isn't as flexible for higher level transaction models. Profiling in SoC Designer is done on-the-fly so a designer doesn't need to wait until the run is finished to begin analysis. With CoWare, it's done as a post-processing step.
EDA DesignLine: SoC Designer is integrated with MATLAB/Simulink and also offers Verilog/VHDL wrappers for the models. Finally, it also integrates with Esterel, a simulation language and system that is becoming more popular in Europe. Are there any significant technical obstacles to fully generalize Carbon's contributions to system level design and in particular expand the types of processors supported by Carbon to DSP, GPU, and others?
Bill Neifert: None. We fully intend to continue the existing partners and integrations already supported by SoC Designer and extend this ecosystem as well to include other types of processors, interconnects and peripheral IP.
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