MANHASSET, NY Cadence will engineer Arasan's MIPI design IP into the Cadence Incisive Verification Kit, which incorporates Cadence-developed MIPI-based verification IP, example flows, user workshops and documented best practices.
The collaboration between Cadence and Arasan will enable potential MIPI users to see first hand a comprehensive working environment with hands-on workshops and labs that demonstrate the industry-standard Open Verification Methodology (OVM).
Cadence will distribute the kit as part of its Incisive verification solution.
"Many of our customers prefer the Cadence Incisive functional verification platform and the OVM-ready verification IP provided by Cadence to achieve the goals of first-time success with their SoC, "said Richard Timpa, Executive Vice President for Arasan Chip Systems, in a statement.
"This collaboration simplifies the challenge of verification at the SoC level, and offers a systematic approach to making sure that the protocol design IP can functionally connect and distribute transactions to devices supporting the protocol," said Michal Siwinski, Group Marketing Director for Cadence Design Systems.
The integrated solution will be available with the Incisive Verification Kit, part of the Incisive Enterprise Simulator and Incisive Enterprise Verifier products, both of which are available now.
Plans are in place to expand to MIPI DSI and USB 3.0.