Altium and Aldec have signed an OEM agreement that adds Aldec's FPGA simulation capabilities to Altium Designer.
Electronics designers can now access Aldec's VHDL and Verilog simulation technology as part of Altium's unified electronics design architecture. Aldec's OEM simulator will be the default VHDL or Verilog FPGA simulation technology in the next release of Altium Designer, currently scheduled for release in the next few weeks.
"Altium Designer has included simple VHDL simulation for FPGA-based designs for a number of years, but this has not been a core focus area for us," said Nick Martin, CEO of Altium (Sydney, Australia). "Partnering with Aldec will allow us to provide a high-quality RTL simulation capability for Altium Designer users, both VHDL and Verilog, from a vendor with great technology and credentials in this area.”
Dr. Stanley M. Hyduke, CEO of Aldec (Henderson, Nevada), added, "Becoming such a central element in simulation for Altium's unified approach to electronics design is an exciting step for Aldec. This agreement will open new opportunities for Aldec with design teams who traditionally would not invest in high-performance VHDL and Verilog simulation."
Users of Altium's NanoBoard FPGA-based development boards will also now be able to create their FPGA-based design prototypes to prove the design concept, and then use the Aldec VHDL or Verilog simulation technology within Altium Designer to test their designs.
The boards come with a 12-month Altium Designer Soft Design License, which will also include the Aldec OEM simulator from the next release of Altium Designer.