Hoehenkirchen-Siegertsbrunn, Germany /Wilsonville, Ore. - Mentor Graphics Corp. and Lauterbach GmbH have collaborated to deliver a hardware-accelerated software development and debug platform for the verification of Systems-on-Chip (SoCs) and embedded systems.
The combination of Mentor’s Veloce hardware emulation technology with Lauterbach’s integrated debug and development tools delivers a high-performance and productive environment for handling concurrent hardware-software verification of embedded systems.
The collaboration helps to bring complex SoC designs to market on schedule without compromising verification accuracy or performance.
Lauterbach is established as the world’s technology and market leader of microprocessor development tools for embedded systems applications, with over 80,000 development seats installed across the globe by the end of 2008. The Lauterbach tools provide a quick and efficient environment for the testing of embedded systems, which is critical for the verification of next-generation SoC designs.
“By combining with Mentor and their Veloce emulator, we can show our customers a high-speed platform that allows them to perform concurrent hardware-software integration many weeks or months before they are committed to real silicon, increasing their verification productivity and improving their time-to-market,” said Norbert Weiss, International Sales & Marketing Manager, Lauterbach GmbH. “Our customers can now access a virtual hardware environment to debug their software at high speeds.”
According to the company, Veloce is the industry’s fastest dual-mode accelerator/emulator, providing MHz performance for both transaction-based verification and traditional in-circuit emulation (ICE). With an extensive portfolio of vertical market solutions, the Veloce product is an ideal choice for embedded systems, multimedia, wireless, and networking applications.
For more information visit http://www.mentor.com/.