LONDON A series of functional 25-stage ring oscillators has been made by a team of researchers from the IBM T.J. Watson Research Center using silicon nanowire transistors with diameters down to 2.6-nanometers. Results are due to be presented at the Symposium on VLSI Technology to be held at Honolulu, Hawaii, June 15 to 18.
The use of silicon nanowire transistors is proposed to allow the continued scaling of CMOS beyond what is possible in planar fabrication.
The IBM researchers position the FinFET device as a near-term solution to planar challenges that has improved electrostatic channel control by placing gates on both sides of the fin channel. The gate-all-around nanowire device is the ultimate evolution of this trend and has the best possible electrostatic channel control, the research states.
The fabrication of ring oscillator structures made up from CMOS inverters demonstrates that this type of device can yield complex circuits.
The silicon nanowire transistors have a hafnium-based dielectric layer separating the inner silicon wire from a gate-all-around polycrystalline silicon gate. The silicon wire was made with a range of diameters down to 2.6-nm and with gate lengths down to 25-nm. The nanowire capacitance shows a size dependence in agreement with that of a cylindrical capacitor and the ac characterization shows enhanced self-heating below diameters of 5-nm.
The results demonstrate a viable scaling path for silicon-based devices, the researchers claimed in an abstract of the full paper.
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