SAN FRANCISCOMarket-leading programmable logic vendor Xilinx Inc. has signed a multi-year strategic licensing agreement to use chip synthesis technology from EDA vendor Oasys Design Systems.
The terms of the agreement and Xilinx' long-terms plans for implementing the technology in FPGA design are not being disclosed, according to the companies.
"With programmable chip sizes growing and complexity mounting, it was clear we needed to look at a new generation of synthesis to support the needs of our customers," said Vin Ratford, Xilinx’s senior vice president of worldwide marketing, in a statement.
Oasys is a four-year-old startup that emerged from stealth mode last year to announce RealTime Designer, a design tool for physical RTL synthesis of 100-million-gate designs. The tool is based on the same technology that Xilinx is licensing.
According to Oasys President and CEO Paul van Besouw, the company will continue to focus on providing tools for ASIC designers. The partnership with Xilinx will bring the benefits of the company's technology to leading-edge FPGA designers as well, van Besouw, said.