At the same time IMEC is working on three generations of biomedical processor, the latest of which could make use of sub-threshold operation transistors. The 2009 instantiation was the BioDSP, optimized for ECG and EEG processing and displaying a tenfold improvement over the Texas Instruments MSP430 in terms of the power consumed while running algorithms.
This year's model is the BioFlux, which is based on the CoolFlux DSP fabric from NXPl, which provides greater programming flexibility. In this IC standby and leakage power have also been reduced, according to Harmke De Groot, program director for ultra low power wireless and DSP at IMEC.
For 2011 de Groot's team is working on an SOC fully optimized for ambulatory ECG measurements through advanced motion artifact removal. Local processing to remove noise and refine data can reduce the radio transmission burden by a factor of 100, de Groot said. And some parts of the SoC will be designed to operate at sub-threshold voltages, said de Groot. "We need library characteristics and we are doing initial experiments. We are making test ICs for such circuits to test models." De Groot said operation was likely to be around 0.2 to 0.3-volts. "It is a case where we must determine the optimization."
De Groot is working in collaboration with the University of Technology Eindhoven on standard cells that are resilient to process variations, taking advantage of effects that are only present at sub-threshold regions such as the reverse short channel effect. This leads to a sub-threshold Vdd of between 0.2-0.3 V in 90 nm CMOS.
"Because of the very low active time (less than 0.2 percent) in ECG processing, leakage energy is dominant in our BioDSP and Bioflux designs - both in 90-nm CMOS," said de Groot. The ECG-SoC is being moved to 180-nm. "The ultralow power and high dynamic range needed for the analog components was the initial trigger to use 180-nm and the analog components are designed at standard Vdd." However, moving the digital part to 180-nm would increase active power consumption, which has motivated de Groot to reduce Vdd to sub-threshold voltages in this upcoming design.
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