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Samsung, TSMC hit by ITC complaint

6/28/2010 10:20 PM EDT
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resistion
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re: Samsung, TSMC hit by ITC complaint
resistion   6/27/2010 6:17:57 AM
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Some more information from the ITC blog. The allegation against TSMC is that they used double patterning with two coatings of photoresist in their 28 nm product. However, I think STC jumped the gun. The gate pitch reported at IEDM does not warrant double patterning. STC is thinking about logic's low 2X nm node, so everyone beware! The allegation against Samsung is based on its 3X nm Flash, but NAND Flash probably would not use STC's process.

resistion
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re: Samsung, TSMC hit by ITC complaint
resistion   6/25/2010 2:33:25 AM
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I'd think Samsung and TSMC use the same photoresists and techniques as other companies like Intel, IBM, Toshiba, NEC, etc.

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