SAN JOSE, Calif. -- A rivalry in EDA has turned into a possible feud. And one group is crying foul.
The Interoperable PDK Libraries (IPL) Alliance recently released its open standard for interoperable process design kits (iPDKs). It uses a p-cell library from Ciranova's PyCell Studio.
The technology competes against Cadence’s Virtuoso tools. The problem is that when end-users call up an iPDK at a customer site, a warning message automatically pops up. It reads as follows: “WARNING* (DB-220704): The usage of non-SKILL Pcells in Virtuoso is not a supported feature.”
The IPL group claims the culprit is Cadence. The IPL group is demanding that Cadence take down and remove the message.
''IPL Alliance member companies and their customers using iPDKs have reported that Cadence Virtuoso issues a warning message indicating that non-SKILL PCells are not supported,’’ according to a statement issued by the IPL Group .
''The warning message started to appear when Virtuoso IC6.1.3 was first released. We believe this to be misleading. Our members and their customers have rigorously tested and validated that all iPDKs work in Cadence Virtuoso 6.x. The Python PCells (PyCells) in iPDK use the same OpenAccess PCell plug-in mechanism used by Cadence SKILL PCells and are completely interoperable. PyCells work correctly and yield the same results in Virtuoso, Custom Designer, Titan, and Laker,’’ according to the IPL group.
Cadence declined to comment on the matter.
The IPL Alliance was started in 2007, with five founding members: AWR, Ciranova, SpringSoft, Silicon Navigator and Synopsys. Mentor Graphics and Pulsic joined as supporting members. The newest members are the following entities: TSMC, Helic, JEDAT, Magma, Micro Magic and Virage Logic. Recently, LFoundry, TowerJazz and others joined the group.
A PDK, as defined by the IPL, is a set of technologies to enable a complete analog and mixed-signal design flow. This consists of foundry-verified data files, such as schematic symbols, component descriptions, parameterized cells (p-cells) and callbacks.
Not all are on board with IPL, however. One EDA vendor, Cadence Systems Design Inc., refuses to join IPL and views the IPL-backed flow as a competitive threat to its analog EDA tool suite, dubbed Virtuoso. Cadence dominates the custom EDA landscape. Cadence's p-cell libraries are written in a rival and proprietary language called Skill, which is said to lock customers into Virtuoso.
IPL is attempting to break Cadence's monopoly in custom design, but the group has also tried to reach out and work with the EDA vendor.