PORTLAND, Ore. -- Magnetic random access memory (MRAM) stores information magnetically, but has so far achieved relatively low densities compared to charge-based memories like flash. Now researchers claim to have solved MRAM's density problems by crafting a ferroelectric interface that allows perpendicular magnetic domains to be as small as 40 nanometers, potentially achieving higher densities than flash.
In conventional MRAMs, two ferromagnetic plates, each of which maintains a magnetic field, are separated by a thin insulating layer. Using magnetic fields to change the state of one plate so that it either matches the other plate or has an opposite orientation, bits can be stored. The new approach developed at Tohoku University (Sendai, Japan) instead uses spin currents to switch memory states, allowing perpendicular magnetic domains that are much smaller than conventional MRAMs.
New York University professor Andrew Kent, an expert in mesoscopic magnetic systems, said it was significant that the Japanese researchers used conventional ferromagnetic material.
By crafting magnetic tunnel junctions for perpendicular recording, the researchers group used interfacial anisotropy between the ferromagnetic plates and the tunnel barrier. Using a material with a CoFeB-to-MgO interface allowed the researchers to produce a giant tunnel magnetoresistance ratio that can switch bits on and off with currents as small as 49 microamps.
MRAM competes against non-volatile RAM (non-volatile SRAMs from CY, battery-backed RAMs from Maxim and FRAMs - not sure who makes this). It is not appropriate to compare MRAM against flash (even NOR flash), at least not yet. Two reasons - price and density - they are nowhere near flash. You use these (MRAMs & nvSRAMs) when your application absolutely demands no loss of data and state of operation in case of a power loss. The interesting part is that MRAMs and nvSRAMS use very different technologies, so any sudden improvement (disruptive) in one is very difficult for the other to beat.
Don't forget there are 2 types of "flash" - NAND flash (as used in SSDs) - accessed in blocks, and NOR flash which is accessed like RAM.
Clearly, MRAM is not going to replace SSD technology any time soon. But, for NOR flash applications, say on-chip with a micro-controller, you have some advantages. It read AND WRITES as fast as SRAM, but it doesn't require power to maintain the data.
So, take for example, a low power application that does analog sensor data capture but only comes on periodically. It could power off almost completely in between and save power.
This may sound like a "niche" right now, but more applications are requiring lower power every day.
MRAM is a long way behind flash, and flash is a moving target, so MRAM will be niche for years yet.
Flash used to called slow, but SSD's now read like this :
* 160 MB/sec sequential read and
* 100MB/sec sequential write speeds.
* 16mm x 20mm x 1.85mm
Not much room there for MRAM, so that leaves NV ram applications.
MRAM's primary advantage is it can cycle pretty much indefinitely. So while Flash memory esp. MLC wears out sooner and needs to be replaced, the MRAM saves the user more money by not needing to be replaced so often. PCM, RRAM and FeRAM also share this same advantage.
Another thing to note is that a larger cell shape (8F^2 or larger) may scale down F to smaller areas more easily than a more basic 4F^2 cell shape.
Non-volatility, lower power, and high speed will enable MRAM to carve out a niche. Sounds like 3D guy is skeptical about size... 1.3F2 is pretty hard to beat...
An old Moto paper (http://www.asensio.com/Report-images/MRAM/MOTMRAMpaper.pdf) claims 1 transistor per for the stacked memory layers. With a 40nm domain, where does that end up in the area calc? Put differently, how much of the 6F2 in DRAM is the storage cell?
Saying MRAM will challenge flash is hyperbole. MRAM doesn't work with a diode based selector, so we're looking at a DRAM like cell (best case) with a cell size of 6F2. Considering this and the bad array efficiency (due to 49uA current) compared to 1.3F2 3 bits per cell flash, we're looking at much lower densities compared to flash. The NAND flash roadmap will mostly continue for many more years with standard NAND and 3D NAND... I can't imagine MRAM replacing it at all, other rewritable materials are better candidates.
At best, MRAM could play a role in some parts of today's non-volatile SRAM market.
With charge storage, we didn't have to worry about spurious magnetic fields. But charge loss is itself an issue. PCM avoids charge loss and magnetic field issues but too bad it is temperature sensitive.
A few days back another article on MRAM, titled "MRAM startup MagSil tips technology" was published on this website (http://new.eetimes.com/electronics-news/4206303/MRAM-startup-MagSil-tips-technology), from where I came to know that Everspin Technologies has already sold its MRAM products as drop-in replacement for SRAM. As I understand MRAM memory is volatile, it needs to have other advantages in order to challenge non-volatile FLASH.
Spintronics is a very exciting field that *might* change future of some electronic devices. But to my knowledge this is still in deep R&D development phase. Anyone knows any developments close to commercial reality?
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.