LONDON – Mentor Graphics Corp. has announced it has been working with GlobalFoundries to create some software called Graphical Design Rule Manual (GDRM) that helps IC designers debug layout design rule violations in chips intended for manufacture by foundry.
Essentially the GlobalFoundries GDRM integrates the results viewing environment from Mentor's Calibre design verification product with the electronic design rule manuals of GlobalFoundries (Sunnyvale, Calif.), Mentor said.
With GDRM, designers using the Calibre RVE tool to correct DRC hotspots can automatically access detailed textual and graphical reference information about the specific rules generating the violations. By providing instant access to relevant information, the solution allows designers to fix errors more quickly and reduce time to signoff, Mentor said.
"The manufacturing variability issues of advanced process nodes has led to an exponential explosion in the complexity of design rules, resulting in longer physical verification debugging cycles," said Andy Brotman, vice president of design infrastructure at GlobalFoundries, in a statement issued by Mentor. "To counteract this trend, GlobalFoundries is investing in unique capabilities aimed at helping GlobalFoundries' customers get to market more quickly. Our GDRM effort with Mentor is a good example of how our collaboration with ecosystem partners addresses specific bottlenecks and improves the overall design-to-silicon flow."
The use of Calibre RVE with GlobalFoundries' GDRM is being shown at a conference being hosted by GlobalFoundries on Sept. 1 in Santa Clara, California. For more information on the Global Technology Conference 2010, visit: http://www.globalfoundries.com/gtc2010/.