SAN JOSE, Calif. – A war of words has broken out between Cadence Design Systems Inc. and a rival process design kit (PDK) group.
The Interoperable PDK Libraries (IPL) Alliance claims that Cadence is playing unfair, saying Cadence is issuing unfounded messages about IPL’s technology. Cadence dismisses the notion, saying its intentions are justified.
The IPL recently released its open standard for interoperable process design kits (iPDKs), which are supposed to reduce costs for analog and mixed-signal designs. It uses a p-cell library from Ciranova's PyCell Studio.
The technology competes against Cadence’s Virtuoso EDA tools. Cadence's p-cell libraries are written in a rival and proprietary language called Skill.
The problem is that when end-users call up an iPDK at a customer site, a warning message automatically pops up. It reads as follows: “WARNING* (DB-220704): The usage of non-SKILL Pcells in Virtuoso is not a supported feature.”
The IPL group claims the culprit is Cadence. The IPL group is demanding that Cadence take down and remove the message.
The IPL Alliance was started in 2007, with five founding members: AWR, Ciranova, SpringSoft, Silicon Navigator and Synopsys. Mentor Graphics and Pulsic joined as supporting members. The newest members are the following entities: TSMC, Helic, JEDAT, Magma, Micro Magic and Virage Logic. Recently, Altera, LFoundry, ST, TowerJazz and others joined the group.
Last month, Cadence declined to comment on the warning message. Recently, however, Cadence responded to the IPL group’s charges.
Steve Lewis, product marketing director at Cadence, said the warning message is justified. Cadence will support customers using its Virtuoso EDA tools, based on its Skill language, he said.
Some customers are using a mix-and-match strategy. In other words, some customers are using Virtuoso, but not Skill. Instead, some are using Virtuoso and Ciranova's PyCell Studio.
In that case, Cadence can’t stop customers from using the hybrid approach. But Cadence also warns customers that they are on their own and cannot guarantee the results.
Cadence will not offer support to customers in this case. “We don’t support PyCells,’’ Lewis said. ''We can’t guarantee the Virtuoso’s behavior with PyCells.’’
The same rational is used if a customer uses IPL’s technology. Cadence can’t stop a customer from using IPL’s iPDKs. But Cadence also wants to warn customers that it will not offer support to a customer using Virtuoso and PyCells.
In this case, Cadence is merely alerting customers with a warning message, he said. Lewis insisted that Skill-not PyCells-is optimized for Virtuoso. “We don’t think that PyCells is the right direction for a PDK,’’ he added.
Cadence, of course, is also protecting its huge installed base of Virtuoso EDA tools in the market. The IPL threatens Cadence’s custom EDA tools, which is why Cadence is playing unfair, according to the IPL.
Besides that, the IPL group claims that its technology based on PyCells is faster and superior than Skill in analog design. Jingwen Yuan, president of the IPL Alliance and strategic alliance manager at Synopsys, reiterated the group’s position and issued the following statement:
“IPL Alliance member companies and their customers using iPDKs have reported that Cadence Virtuoso issues a warning message indicating that non-SKILL PCells are not supported. The warning message started to appear when Virtuoso IC6.1.3 was first released. We believe this to be misleading. Our members and their customers have rigorously tested and validated that all iPDKs work in Cadence Virtuoso 6.x. The Python PCells (PyCells) in iPDK use the same OpenAccess PCell plug-in mechanism used by Cadence SKILL PCells and are completely interoperable. PyCells work correctly and yield the same results in Virtuoso, Custom Designer, Titan, and Laker.”