LONDON – IBM has announced a 180-nm chip-making process technology for power-management applications that can combine wireless communications and sensors.
The process, labeled CMOS-7HV, will be run primarily at IBM's wafer fab in Burlington, Vermont and the company is rolling out the process to manufacturers in the consumer electronics, industrial, automotive, digital media and alternative-energy segments. IBM is already accepting designs from customers and is scheduling full production for the first half of 2011.
CMOS-7HV includes a triple-gate oxide high voltage CMOS technology that operates at up to 50-V and extendable to 120-V. It also includes support for RF in term of precision polycrystalline, diffusion and well resistors, MIM capacitors and characterized vertical capacitors. The process offers three to seven levels of aluminum interconnect including thick last metal. There is a one-time programmable memory option and the I/O pins can be wirebonded or solder bumped.
As a result the process can integrate wireless communications and power management in a single chip. The company foresees the application of the technology in "smart" building monitor ICs, solar panels, energy grids, industrial, automotive and transportation systems. Chips based on the technology would also have a role in consumer electronics and mobile phones, the company said.
"By enabling more efficient power management in smart phones, IBM's technology opens up the possibility of using smaller, lighter batteries or needing less recharge time to provide the same amount of 'talk' time, video sharing or picture-snapping," said Jeff Hilbert, president and co-founder of Wispry Inc. (Irvine, Calif.) in a statement issued by IBM.
"Integrating communications and power sensors on one chip cuts costs for the industry and is an example of our 'smart-planet' technology vision – one that we back up with R&D," said Michael J. Cadigan, general manager, IBM Microelectronics Division, in the same statement.
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