LONDON – Achronix Semiconductor Corp. will be including the hard Quickpath IP core in support of processor communications on forthcoming field programmable gate arrays enabled by Intel manufacturing.
Quickpath Interconnect is a point-to-point processor interconnect developed by Intel to compete with HyperTransport. The move looks set to be a pre-cursor to the inclusion of one or multiple hard Intel processor cores on an Achronix FPGA.
It adds fuel to the idea of the importance of multicore-processor-array-plus-FPGA-fabric as a generalized design platform going forward. It supports the idea that the Intel-Achronix deal parallels an FPGA-processor collaboration announced by Xilinx Inc. and ARM Holdings plc in October 2009.
As Achronix (San Jose, Calif.) makes the jump from 65-nm to 22-nm processing, courtesy of Intel (Santa Clara, Calif.), a large number additional applications could come into the domain of its FPGAs, said John Lofton Holt, founder, chairman and CEO. And that makes for additional decisions as to what hard IP to include on its devices.
To date at 65-nm the company has included a number of different SERDES links in support of its applicability in communications and networking infrastructure. "We spend a lot of time talking to customers about what they will need in three or four years time and what to harden. From the 65-nm generation we have a laundry list of items that didn't quite have the volume to be justified," Holt said.