PARIS – EDA startup Oasys Design Systems Inc. said it has appointed Craig Robbins as senior vice president of sales, reporting to the company's CEO Paul van Besouw.
In his new position, Robbins (see picture) will be in charge of building a worldwide sales and support team to further expand deployment of RealTime Designer, a Chip Synthesis platform used in production flows at leading edge semiconductor and systems companies.
Robbins started his EDA career at Computervision, where he served as regional sales manager, and Gateway Design Automation, where he was vice president of sales. Once Cadence Design Systems acquired Gateway in 1989, he became vice president of North American sales at Cadence. Since 1993, he has held a series of senior executive sales positions at companies such as Redwood Design Automation, ATG Technology, Cadence, Hier Design, Silicon Perspective and Nusym Technology.
Founded in 2004, Oasys Design System claims it has come out of stealth mode with a platform for Logic design, called 'Chip Synthesis'.
Oasys RealTime Designer brings a new approach to design creation, taking an entire chip design all the way from RTL down to placed gates/macros in a single pass. The physical RTL synthesis approach is such that Oasys claims that designs of tens of millions of gates can be handled on an off-the-shelf PC in a few hours, producing results as good as or better than the well-known mainstream synthesis tools take days to achieve. Final place and route is done with any standard commercial tool and correlates with the predicted performance.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.