SANTA CLARA, Calif. - At the ARM Technology Conference here this week, Gary Patton, vice president of the Semiconductor Research and Development Center at IBM Corp., was one of the keynote speakers.
In his comprehensive and informative presentation, entitled ‘’Semiconductor Technology Innovation at 20-nm and beyond,’’ Patton talked about the status of lithography, materials and future devices. Here’s what surprised me about his presentation:
1. EUV is still not ready
Many leading-edge chip makers moved from 193-nm ''dry’’ lithography to 193-nm immersion at the 45-nm node. Intel Corp. was the exception, as the chip giant moved to immersion at 32-nm. Chip makers will most likely use 193-nm immersion-with dreaded double-patterning techniques-at 28- and 22-nm.
For the 15/14-nm node, the industry has been banking on extreme ultraviolet (EUV) lithography, a soft X-ray, 13-nm wavelength technology.
EUV is being targeted sometime ''at the 14-nm or 11-nm timeframe,’’ Patton said in the presentation. At 15/14-nm, ''EUV would be advantageous-if it is ready.’’
In a brief interview, Patton said EUV is still not ready for prime time. That’s not news. For years, EUV has been delayed due to the lack of power sources, resists, masks and inspection tools.
What’s surprising is there should be some consensus-or an inkling-about the status of EUV-at least by now. The clock is ticking. The first user, Samsung Electronics Co. Ltd., wants EUV for memory production in 2012. The tool maker, ASML Holding NV, is working hard to ship its initial production EUV machine before then. Many are betting against ASML, meaning Samsung and others will continue to work in the optical litho world for some time.
2. Importance of computational lithography
Computational lithography has received a fair amount of attention. But at one time, the technology was considered a mere science project. And there were far more press releases about it than actual shipments.
Now, to extend optical lithography to 22- and 20-nm, IBM, Intel and even the EDA vendors are serious about computational techniques. Every vendor has a different name for it, causing confusion in the market.
But nonetheless, at 22- and 20-nm, chip vendors may have to resort to computational lithography, which includes source-mask optimization (SMO), pixilated masks, custom lenses, among other techniques, Patton said.
3. No status report on high-k
In December of 2007, IBM and Intel separately announced their high-k/metal-gate technologies for the gate stack. Today, Intel has put two generations of high-k in production. In contrast, the industry is still waiting for IBM-and its partners-to deliver chips based on high-k.
One IBM partner, Samsung, right now claims to be running shuttles, which includes a 32-nm process with high-k. Officials from Samsung said the high-k technology is working ''pretty good’’ despite rumors to the contrary.
Another partner, Advanced Micro Devices Inc., will not ship processors based on high-k until the first half of 2011. Rumors are running rampant that the shipment date has slipped to the second half of 2011. There is a slight disconnect. In his presentation, Patton mentioned high-k/metal-gate as an enabler for the gate stack, but gave no status report on the technology.
4. The end of an era?
The industry has known that a new breakthrough is needed to extend the CMOS era. Patton believes that a new device structure—beyond today’s planar technology-will be required at the 14-nm node to extend CMOS.
As before, there are several candidates with no clear-cut leader. Among the possibilities include FinFETs as well as next-generation devices based on fully depleted silicon-on-insulator (SOI) or extremely thin SOI. FinFETs are complex to manufacture, while the newfangled SOI devices have challenges, he said.
5. No mention of 450-mm
Patton made no mention of 450-mm during his presentation. Recently, however, rival Intel announced a new fab, which is supposedly ''450-mm ready.’’ Clearly, the industry is not ready to move to 450-mm right now, but Intel is reportedly jumpstarting the effort.
Some of IBM's partners are jumping for joy. Moving to 450-mm entails a lot of R&D dollars and risk. If tool vendors are willing to devise 450-mm gear-which in itself is unclear-Intel must take the painstaking task of ironing out the bugs. So, let Intel take the risk.
On the other hand, IBM and its partners, GlobalFoundries and Samsung, don’t want to be left too far behind. In fact, Samsung is pushing hard for 450-mm. Like Intel, it wants 450-mm. To a large degree, however, GlobalFoundries is lukewarm about it.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.