LONDON Samsung Electronics Co. Ltd. has announced an 8-Gbyte (64-Gbit) registered dual-inline memory module (RDIMM) with through-silicon-via (TSV) die-stacking that it claims saves 40 percent of the power consumption of a conventional RDIMM.
The memory module is based on multiple DDR3 DRAM die made using a 4X-nm process technology. It has been tested by Samsung customers and delivers superior performance because of its use of three-dimensional (3-D) chip stacking using TSVs, Samsung said.
We plan to provide TSV-based devices in line with the expected introduction of TSV-enabling chipsets, which are now slated to arrive in the second half of 2011, according to a spokesman for Samsung.
TSV technology creates micron-sized holes through the silicon die and
fills them with copper. By using a TSV bonding process, instead of
conventional wire bonding silicon wires are shortened. The technology is
the key to solving the paradox of lowering absolute power consumption
while increasing memory capacity and system performance, Samsung said.
The reduced energy consumption allows modules to be brought closer together without overheating problems therefore allowing for an improvement in system-level memory density, Samsung said. This is expected to be important in next-generation servers where there is predicted to be a 30 percent drop in memory slots, Samsung said. The use of TSVs will enable DRAM density to rise by more than 50 percent to offset this and making it a suitable memory option for high-performance servers, the company added.
Widespread adoption of 3-D TSV technology is expected to take place from 2012 and Samsung plans to deploy TSV technology in 3X-nm and finer process nodes, the company said.
Related links and articles:
Samsung tips six predictions in IC scaling
Atrenta, CEA-Leti team on 3-D design
Sematech completes 3-D chip pilot line
DAC panel: Disruptive 3-D vias will follow applications