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Intel details Sandy Bridge at ISSCC

2/23/2011 06:04 AM EST
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unknown multiplier
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re: Intel details Sandy Bridge at ISSCC
unknown multiplier   6/19/2011 4:13:05 PM
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A company like Intel must favor the SoC approach as it enables the autocratic control over the final system product, in contrast to SiP, where it has to depend on other companies' supplied parts.

satya_ibm
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re: Intel details Sandy Bridge at ISSCC
satya_ibm   2/24/2011 7:25:25 AM
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I dont think Intel Integrated graphics can beat AMD's in near future. AMD graphics is way ahead of Intels. Response from Intel's Graphics is too slow compared to AMD/ATI. I have Wii also, amaging quality. Also see latest HP product dm1z with AMD latest processor which has integrated graphics processor, what an amaging product.

LordTwaroog
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re: Intel details Sandy Bridge at ISSCC
LordTwaroog   2/24/2011 6:35:56 AM
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Thanks for a bit of idea - I'll explore this soon.

goafrit
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re: Intel details Sandy Bridge at ISSCC
goafrit   2/24/2011 12:44:41 AM
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The more you look, the less you see. It is free press, I doubt if they disclosed anything new. Just telling AMD to shut down because they have moved on.

Kinnar
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re: Intel details Sandy Bridge at ISSCC
Kinnar   2/23/2011 5:44:35 PM
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This is a highly awaited information about the Architecture from Intel and it is good that Intel has started providing some technical information. By the time Haswell Architecture comes in usage the might get complete information about Sandy Bridge.

jnhong
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re: Intel details Sandy Bridge at ISSCC
jnhong   2/23/2011 3:15:28 PM
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Interesting. It is likely a large, distributed PFET to modulate VDD into every bitcell. It throttles the power to every cell in a row when a write op is performed. That's the easy part. The interesting part is this pfet is "shared", so it could also affect the neighboring row of bitcells, which may lose their data when VDD is dropped. Or not, depending on leakage and noise. Another ISSCC paper should reveal more details. I originally thought it switched VDD, but reading closely, it implies VDD modulation, rather than on/off. The technique has significant layout impact -- the 6T cell becomes 8T equivalent and layout symmetry is very much compromised.

LordTwaroog
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re: Intel details Sandy Bridge at ISSCC
LordTwaroog   2/23/2011 7:44:46 AM
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Question: How does the p-channel sharing technique work?

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