SAN FRANCISCO—EDA and IP vendor Synopsys Inc. said Monday (Feb. 28) that its DesignWare IP supports the final version of the PCI Express (PCIe) 3.0 base specification recently released by the PCI Special Interest Group (PCI-SIG).
Synopsys (Mountain View, Calif.) said it has enhanced its DesignWare digital controllers for PCIe with new features, including support for the latest PIPE 3.0 specification (v0.9), PCI-SIG Engineering Change Notifications (ECNs), 256-bit datapath and embedded DMA engine. The enhancements provide performance improvements for the PCIe interface, according to Synopsys.
DesignWare IP for PCIe 3.0 is currently being used by leading semiconductor companies developing high-performance enterprise computing SoC designs, Synopsys said. The DesignWare portfolio of digital controllers for PCIe 3.0 includes Endpoint, Root Complex, Switch and Dual Mode cores, enabling designers to easily integrate the 8.0 GT/s PCI Express 3.0 interface into their SoC designs with less risk and improved time-to-market, the company said.
Synopsys said it would demonstrate the newest PCIe features at the IP Summit at the company's SNUG users' group conference in Santa Clara, Calif. on March 30.
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